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1. WO2020135313 - POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR

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Publication Number WO/2020/135313
Publication Date 02.07.2020
International Application No. PCT/CN2019/127355
International Filing Date 23.12.2019
IPC
H01L 29/06 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02Semiconductor bodies
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
CPC
H01L 29/06
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
H01L 29/66068
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66053of devices having a semiconductor body comprising crystalline silicon carbide
66068the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
H01L 29/78
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
H01L 29/7806
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
7802Vertical DMOS transistors, i.e. VDMOS transistors
7803structurally associated with at least one other device
7806the other device being a Schottky barrier diode
Applicants
  • 东南大学 SOUTHEAST UNIVERSITY [CN]/[CN]
  • 无锡华润上华科技有限公司 CSMC TECHNOLOGIES FAB2 CO., LTD. [CN]/[CN]
Inventors
  • 孙伟锋 SUN, Weifeng
  • 娄荣程 LOU, Rongcheng
  • 肖魁 XIAO, Kui
  • 林峰 LIN, Feng
  • 魏家行 WEI, Jiaxing
  • 李胜 LI, Sheng
  • 刘斯扬 LIU, Siyang
  • 陆生礼 LU, Shengli
  • 时龙兴 SHI, Longxing
Agents
  • 广州华进联合专利商标代理有限公司 ADVANCE CHINA IP LAW OFFICE
Priority Data
201811583692.124.12.2018CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
(FR) DISPOSITIF À SEMI-CONDUCTEUR DE PUISSANCE ET SON PROCÉDÉ DE FABRICATION
(ZH) 功率半导体器件及其制造方法
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Abstract
(EN)
A power semiconductor device and a manufacturing method therefor. The device comprises: a substrate (1); drain metal (10); a drift region (2); a base region (3); a gate structure; a first conductive type doped region (13) contacting the base region (3) on the side of the base region (3) distant from the gate structure; a source region (4) provided in the base region (3) and between the first conductive type doped region (13) and the gate structure; contact metal (11) that is provided on the first conductive type doped region (13) and forms a contact barrier having rectifying characteristics together with the first conductive type doped region (13) below; and source metal (6) wrapping the contact metal (11) and contacting the source region (4).
(FR)
L'invention concerne un dispositif à semi-conducteur de puissance ainsi que son procédé de fabrication. Le dispositif comprend : un substrat (1) ; un métal de drain (10) ; une région de dérive (2) ; une région de base (3) ; une structure de grille ; une région dopée de premier type de conductivité (13) en contact avec la région de base (3) sur le côté de la région de base (3) à distance de la structure de grille ; une région de source (4) disposée dans la région de base (3) et entre la région dopée de premier type de conductivité (13) et la structure de grille ; un métal de contact (11) qui est disposé sur la région dopée de premier type de conductivité (13) et forme une barrière de contact ayant des caractéristiques de redressement conjointement avec la région dopée de premier type de conductivité (13) ci-dessous ; et un métal de source (6) enveloppant le métal de contact (11) et en contact avec la région de source (4).
(ZH)
一种功率半导体器件及其制造方法，所述器件包括：衬底(1)；漏极金属(10)；漂移区(2)；基区(3)；栅结构；第一导电类型掺杂区(13)，在基区(3)远离栅结构的一侧与基区(3)接触；源区(4)，设于基区(3)中、第一导电类型掺杂区(13)与栅结构之间；接触金属(11)，设于第一导电类型掺杂区(13)上，与下方的第一导电类型掺杂区(13)形成具有整流特性的接触势垒；源极金属(6)，包裹接触金属(11)，并与源区(4)接触。
Also published as
CN111354794
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