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1. WO2020134669 - TRANSISTOR MANUFACTURING METHOD AND GATE-ALL-AROUND DEVICE STRUCTURE

Publication Number WO/2020/134669
Publication Date 02.07.2020
International Application No. PCT/CN2019/117797
International Filing Date 13.11.2019
IPC
H01L 21/28 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H01L 21/336 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
H01L 29/423 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40Electrodes
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
H01L 29/78 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
CPC
H01L 21/28
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
H01L 29/401
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
401Multistep manufacturing processes
H01L 29/423
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
H01L 29/42356
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
42312Gate electrodes for field effect devices
42316for field-effect transistors
4232with insulated gate
42356Disposition, e.g. buried gate electrode
H01L 29/66484
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
66484with multiple gate, at least one gate being an insulated gate
H01L 29/78
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
Applicants
  • 中芯集成电路(宁波)有限公司上海分公司 NINGBO SEMICONDUCTOR INTERNATIONAL CORPORATION (SHANGHAI BRANCH) [CN]/[CN]
Inventors
  • 秦晓珊 QIN, Xiaoshan
Agents
  • 北京思创大成知识产权代理有限公司 BEIJING SICHUANG DACHENG INTELLECTUAL PROPERTY AGENCY CO., LTD.
Priority Data
201811602315.826.12.2018CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) TRANSISTOR MANUFACTURING METHOD AND GATE-ALL-AROUND DEVICE STRUCTURE
(FR) PROCÉDÉ DE FABRICATION DE TRANSISTOR ET STRUCTURE DE DISPOSITIF À GRILLE ENROBANTE
(ZH) 晶体管的制作方法及全包围栅极器件结构
Abstract
(EN)
Disclosed are a transistor manufacturing method and a gate-all-around device structure. The method comprises: providing a substrate, wherein the substrate comprises a bottom layer base, an insulating layer and a top layer base in sequence from bottom to top; forming a source electrode area and a drain electrode area on the top layer base, and forming a channel area between the source electrode area and the drain electrode area, wherein a direction from the source electrode area to the drain electrode area is a first direction, and a direction perpendicular to the first direction is a second direction; in the second direction, forming holes penetrating the top layer base on two sides of the groove area; etching the insulating layer below the holes and below the channel area through the holes to form a cavity, wherein the cavity is in communication with the holes; and forming a gate electrode structure to cover an upper surface of the channel area, the holes and a wall face, close to the channel area, of the cavity, wherein the gate electrode structure comprises a gate dielectric layer and a gate electrode covering the gate dielectric layer. A gate-all-around structure is formed on the two sides, the upper surface and the lower surface of the channel area, so that the ability of the gate electrode to control a channel is improved, breakdown voltage is increased, a current Ids is increased, and a growing process of a gate electrode insulating layer of an MOS transistor is simplified.
(FR)
L'invention concerne un procédé de fabrication de transistor et une structure de dispositif à grille enrobante. Le procédé consiste à : fournir un substrat, le substrat comprenant une base de couche inférieure, une couche isolante et une base de couche supérieure successivement de bas en haut ; former une zone d'électrode source et une zone d'électrode déversoir sur la base de couche supérieure, et former une zone de canal entre la zone d'électrode source et la zone d'électrode déversoir, une direction allant de la zone d'électrode source à la zone d'électrode déversoir étant une première direction, et une direction perpendiculaire à la première direction étant une seconde direction ; dans la seconde direction, former des trous pénétrant dans la base de couche supérieure sur deux côtés de la zone de rainure ; graver la couche isolante en dessous des trous et en dessous de la zone de canal à travers les trous pour former une cavité, la cavité étant en communication avec les trous ; et former une structure d'électrode grille pour recouvrir une surface supérieure de la zone de canal, les trous et une face de paroi, à proximité de la zone de canal, de la cavité, la structure d'électrode grille comprenant une couche diélectrique de grille et une électrode grille recouvrant la couche diélectrique de grille. Une structure enrobante est formée sur les deux côtés, la surface supérieure et la surface inférieure de la zone de canal, de telle sorte que la capacité de l'électrode grille à commander un canal est améliorée, que la tension de claquage est augmentée, qu'un courant Ids est augmenté, et un processus de croissance d'une couche isolante d'électrode grille d'un transistor MOS est simplifié.
(ZH)
一种晶体管的制作方法及全包围栅极的器件结构,该方法包括:提供基底,基底由下至上依次包括底层衬底、绝缘层和顶层衬底;在顶层衬底形成源极区和漏极区,在源极区和漏极区之间形成沟道区,源极区至漏极区的方向为第一方向,垂直第一方向为第二方向;在第二方向上,沟道区两侧形成贯穿顶层衬底的孔;通过孔刻蚀孔下方及沟道区下方的绝缘层,以形成空腔,空腔与孔连通;形成栅极结构,覆盖所述沟道区上表面、所述孔和所述空腔靠近沟道区的壁面,所述栅极结构包括栅介质层及覆盖所述栅介质层的栅极。在沟道区的两侧及上下表面形成全包围的栅极结构,增加栅极对沟道的控制能力,提高击穿电压,同时提高电流Ids,简化MOS晶体管的栅极绝缘层的生长工艺。
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