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1. WO2020133832 - GOA CIRCUIT

Publication Number WO/2020/133832
Publication Date 02.07.2020
International Application No. PCT/CN2019/083591
International Filing Date 22.04.2019
IPC
G09G 3/36 2006.1
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
34by control of light from an independent source
36using liquid crystals
CPC
G09G 3/3674
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix ; no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
34by control of light from an independent source
36using liquid crystals
3611Control of matrices with row and column drivers
3674Details of drivers for scan electrodes
Applicants
  • 深圳市华星光电半导体显示技术有限公司 SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD. [CN]/[CN]
Inventors
  • 宋乔乔 SONG, Qiaoqiao
Agents
  • 深圳翼盛智成知识产权事务所(普通合伙) ESSEN PATENT&TRADEMARK AGENCY
Priority Data
201811605197.626.12.2018CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) GOA CIRCUIT
(FR) CIRCUIT GOA
(ZH) GOA电路
Abstract
(EN)
Provided is a GOA circuit, comprising a plurality of cascaded GOA circuit units, a first data signal line (1), a second data signal line (2), N-th stage GOA circuit output signal (Sn), N-th stage gate output signal line (Gn), N+2-th stage gate output signal line (Gn + 2) and a plurality of sets of N-type and P-type thin film transistors (T1, T2, T3, T4. By adding N-type and P-type thin film transistors (T1, T2, T3, T4) to the GOA circuit, the line arrangement is reduced, the number of GOA circuits is reduced, ultra-narrow frame panel is achieved, and production cost is reduced.
(FR)
La présente invention concerne un circuit GOA comprenant une pluralité d'unités de circuit GOA en cascade, une première ligne de signaux de données (1), une seconde ligne de signaux de données (2), un signal de sortie de circuit GOA d'énième étage (Sn), une ligne de signaux de sortie de grille d’énième étage (Gn), une ligne de signaux de sortie de grille de N+2 énième étage (Gn +2) et une pluralité d'ensembles de transistors en couches minces de type N et de type P (T1, T2, T3, T4). En ajoutant des transistors en couches minces de type N et de type P (T1, T2, T3, T4) au circuit GOA, l'agencement de lignes est réduit, le nombre de circuits GOA est réduit, un panneau de trame ultra-étroit est obtenu, et le coût de production est réduit.
(ZH)
一种GOA电路,包括级联的多个GOA电路单元、第一数据信号线(1)、第二数据信号线(2)、第N级GOA电路输出信号(Sn)、第N级栅极输出信号线(Gn)、第N+2级栅极输出信号线(Gn+2)及多组N型与P型连接的薄膜晶体管(T1, T2, T3, T4),通过在GOA电路中增加N型和P型的薄膜晶体管(T1, T2, T3, T4),减少线路的排布,减少GOA电路数目,实现超窄边框面板,降低生产成本。
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