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1. WO2020132821 - POST CODE REPORTING VIA SECURE DIGITAL MEMORY INTERFACE

Publication Number WO/2020/132821
Publication Date 02.07.2020
International Application No. PCT/CN2018/123146
International Filing Date 24.12.2018
IPC
G06F 9/445 2018.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
44Arrangements for executing specific programs
445Program loading or initiating
CPC
G06F 11/2284
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
2284by power-on test, e.g. power-on self test [POST]
Applicants
  • INTEL CORPORATION [US]/[US]
  • WANG, Yanbai [CN]/[CN] (BZ)
  • ZENG, Lingjing [CN]/[CN] (BZ)
Inventors
  • WANG, Yanbai
  • ZENG, Lingjing
Agents
  • BEIJING EAST IP LTD.
Priority Data
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) POST CODE REPORTING VIA SECURE DIGITAL MEMORY INTERFACE
(FR) SIGNALEMENT DE CODES POST VIA UNE INTERFACE DE MÉMOIRE NUMÉRIQUE SÉCURISÉE
Abstract
(EN)
Device and method for reporting power-on self-test (POST) codes of a computing device via a standard external memory card interface. A BIOS of the personal computing device is programmed to configure, during a power-on sequence, multiple signal connections of the standard external memory card interface for conveyance of general purpose input and output signals. When a complementary memory signal conversion device is detected in the memory card interface during the power-on sequence, the BIOS may initiate transmission of a serial data signal containing POST codes related to any detected startup errors.
(FR)
L'invention concerne un dispositif et un procédé de signalement de codes d'autotest à la mise sous tension (POST) d'un dispositif informatique via une interface de carte mémoire externe standard. Un BIOS du dispositif informatique personnel est programmé pour configurer, pendant une séquence de mise sous tension, de multiples connexions de signal de l'interface de carte mémoire externe standard pour l'acheminement de signaux d'entrée-sortie à usage général. Lorsqu'un dispositif complémentaire de conversion de signaux de mémoire est détecté dans l'interface de carte mémoire pendant la séquence de mise sous tension, le BIOS peut déclencher la transmission d'un signal de données série contenant des codes POST liés à d'éventuelles erreurs de démarrage détectées.
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