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1. WO2020117686 - SEMICONDUCTOR DEVICE PERFORMING ROW HAMMER REFRESH OPERATION

Publication Number WO/2020/117686
Publication Date 11.06.2020
International Application No. PCT/US2019/064028
International Filing Date 02.12.2019
IPC
G11C 11/406 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
401forming cells needing refreshing or charge regeneration, i.e. dynamic cells
406Management or control of the refreshing or charge-regeneration cycles
G11C 11/408 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
401forming cells needing refreshing or charge regeneration, i.e. dynamic cells
4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
407for memory cells of the field-effect type
408Address circuits
G06F 3/06 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from, or digital output to, record carriers
Applicants
  • MICRON TECHNOLOGY, INC. [US]/[US]
Inventors
  • ISHIKAWA, Toru
  • NAKANISHI, Takuya
  • BESSHO, Shinji
Agents
  • ENG, Kimton
  • ANDKEN, Kerry Lee
  • QUECAN, Andrew F.
  • ITO, Mika
  • HEGSTROM, Brandon
  • MA, Yue Matthew
  • STERN, Ronald
  • MEIKLEJOHN, Paul T.
  • SPAITH, Jennifer
  • ORME, Nathan
  • CORDRAY, Michael S.
Priority Data
16/208,21703.12.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE PERFORMING ROW HAMMER REFRESH OPERATION
(FR) DISPOSITIF À SEMI-CONDUCTEUR EFFECTUANT UNE OPÉRATION DE RAFRAÎCHISSEMENT D'ATTAQUES RÉPÉTÉES
Abstract
(EN)
Disclosed herein is an apparatus that includes a memory ceil array including a plurality of word lines each coupled to a plurality of memory cells, and a control circuit configured to activate first and second internal signals in a time-division manner in response to a first external command. A first number of the word lines are selected in response to the first internal signal, and a second number of the word line is selected in response to the second internal signal, the second number is smaller than the first number.
(FR)
L'invention concerne un appareil qui comprend un réseau de cellules de mémoire comprenant une pluralité de lignes de mots, chacune couplée à une pluralité de cellules de mémoire, et un circuit de commande configuré pour activer des premier et second signaux internes selon une répartition dans le temps en réponse à une première commande externe. Un premier nombre de lignes de mots est sélectionné en réponse au premier signal interne, et un second nombre de lignes de mots est sélectionné en réponse au second signal interne, le second nombre étant inférieur au premier nombre.
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