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1. WO2020117665 - PROCESSORS WITH SECURITY LEVELS ADJUSTABLE PER APPLICATIONS

Publication Number WO/2020/117665
Publication Date 11.06.2020
International Application No. PCT/US2019/063990
International Filing Date 02.12.2019
IPC
G06F 21/71 2013.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71to assure secure computing or processing of information
G06F 21/50 2013.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
50Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
CPC
G06F 12/1036
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
10Address translation
1027using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
1036for multiple virtual address spaces, e.g. segmentation
G06F 21/602
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
60Protecting data
602Providing cryptographic facilities or services
G06F 21/72
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71to assure secure computing or processing of information
72in cryptographic circuits
G06F 21/74
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71to assure secure computing or processing of information
74operating in dual or compartmented mode, i.e. at least one secure mode
G06F 9/30043
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30003Arrangements for executing specific machine instructions
3004to perform operations on memory
30043LOAD or STORE instructions; Clear instruction
G06F 9/30076
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30003Arrangements for executing specific machine instructions
30076to perform miscellaneous control operations, e.g. NOP
Applicants
  • MICRON TECHNOLOGY, INC. [US]/[US]
Inventors
  • WALLACH, Steven
Agents
  • WARD, John P.
Priority Data
16/210,60505.12.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) PROCESSORS WITH SECURITY LEVELS ADJUSTABLE PER APPLICATIONS
(FR) PROCESSEURS AVEC DES NIVEAUX DE SÉCURITÉ AJUSTABLES PAR APPLICATIONS
Abstract
(EN)
Methods, systems, and apparatuses related to adjustable security levels in processors are described. A processor may have functional units and a register configured to control security operations of the functional units. The register configures the functional units to operate in a first mode of security operations when the register contains a first setting; and the register configures the functional units to operate in a second mode of security operations when the register contains a second setting (e.g., to skip/bypassing a set of security operation circuit for enhanced execution speed).
(FR)
L'invention concerne des procédés, des systèmes et des appareils associés à des niveaux de sécurité ajustables dans des processeurs. Un processeur peut comprendre des unités fonctionnelles et un registre configuré pour commander les opérations de sécurité des unités fonctionnelles. Le registre configure les unités fonctionnelles pour fonctionner dans un premier mode d'opérations de sécurité lorsque le registre contient un premier paramètre ; et le registre configure les unités fonctionnelles pour fonctionner dans un second mode d'opérations de sécurité lorsque le registre contient un second paramètre (par exemple, pour sauter/contourner un ensemble de circuits d'opérations de sécurité en vue d'une meilleure vitesse d'exécution).
Also published as
Latest bibliographic data on file with the International Bureau