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1. WO2020117406 - CIRCUIT BOARD WITH COMPACT PASSIVE COMPONENT ARRANGEMENT

Publication Number WO/2020/117406
Publication Date 11.06.2020
International Application No. PCT/US2019/058459
International Filing Date 29.10.2019
IPC
H01L 25/065 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/78
H01L 23/31 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulation, e.g. encapsulating layers, coatings
31characterised by the arrangement
H01L 23/528 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
528Layout of the interconnection structure
CPC
H01L 21/561
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
561Batch processing
H01L 21/565
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
565Moulds
H01L 21/568
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
568Temporary substrate used as encapsulation process aid
H01L 23/49838
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements
488consisting of soldered ; or bonded; constructions
498Leads, ; i.e. metallisations or lead-frames; on insulating substrates, ; e.g. chip carriers
49838Geometry or layout
H01L 25/16
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; ; Multistep manufacturing processes thereof
16the devices being of types provided for in two or more different main groups of H01L27/00 - H01L49/00 ; and H01L51/00; , e.g. forming hybrid circuits
H05K 1/0231
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
0213Electrical arrangements not otherwise provided for
0216Reduction of cross-talk, noise or electromagnetic interference
023using auxiliary mounted passive components or auxiliary substances
0231Capacitors or dielectric substances
Applicants
  • ADVANCED MICRO DEVICES, INC. [US]/[US]
Inventors
  • BHAGAVAT, Milind, S.
  • AGARWAL, Rahul
Agents
  • HONEYCUTT, Timothy, Mark
Priority Data
16/213,34707.12.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) CIRCUIT BOARD WITH COMPACT PASSIVE COMPONENT ARRANGEMENT
(FR) CARTE DE CIRCUIT IMPRIMÉ DOTÉE D'UN AGENCEMENT DE COMPOSANTS PASSIFS COMPACTS
Abstract
(EN)
Various circuit boards with mounted passive components and method of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes at least partially encapsulating a first plurality of passive components (235) in a molding material (240) to create a first molded passive component group (233a). The first molded passive component group is mounted on a surface of a circuit board (210). The first plurality of passive components are electrically connected to the circuit board.
(FR)
L'invention porte sur diverses cartes de circuit imprimé dotées de composants passifs montés et leur procédé de fabrication. Selon un aspect, l'invention porte sur un procédé de fabrication qui comprend l'encapsulation au moins partielle d'une première pluralité de composants passifs (235) dans un matériau de moulage (240) pour créer un premier groupe de composants passifs moulés (233a). Le premier groupe de composants passifs moulés est monté sur une surface d'une carte de circuit imprimé (210). La première pluralité de composants passifs est électriquement connectée à la carte de circuit imprimé.
Latest bibliographic data on file with the International Bureau