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1. WO2020117336 - CAPACITIVE COUPLING IN A DIRECT-BONDED INTERFACE FOR MICROELECTRONIC DEVICES

Publication Number WO/2020/117336
Publication Date 11.06.2020
International Application No. PCT/US2019/048530
International Filing Date 28.08.2019
IPC
H01L 25/065 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/78
H01L 25/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
H01L 23/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
H01L 21/311 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3105After-treatment
311Etching the insulating layers
H01L 21/02 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
Applicants
  • INVENSAS CORPORATION [US]/[US]
Inventors
  • HABA, Belgacem
  • SITARAM, Arkalgud R.
Agents
  • LATTIN, Christopher W.
Priority Data
16/212,24806.12.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) CAPACITIVE COUPLING IN A DIRECT-BONDED INTERFACE FOR MICROELECTRONIC DEVICES
(FR) COUPLAGE CAPACITIF DANS UNE INTERFACE À LIAISON DIRECTE DE DISPOSITIFS MICRO-ÉLECTRONIQUES
Abstract
(EN)
Capacitive couplings in a direct- bonded interface for microelectronic devices are provided. In an implementation, a microelectronic device includes a first die and a second die direct- bonded together at a bonding interface, a conductive interconnect between the first die and the second die formed at the bonding interface by a metal-to-metal direct bond, and a capacitive interconnect between the first die and the second die formed at the bonding interface. A direct bonding process creates a direct bond between dielectric surfaces of two dies, a direct bond between respective conductive interconnects of the two dies, and a capacitive coupling between the two dies at the bonding interface. In an implementation, a capacitive coupling of each signal line at the bonding interface comprises a dielectric material forming a capacitor at the bonding interface for each signal line. The capacitive couplings result from the same direct bonding process that creates the conductive interconnects direct- bonded together at the same bonding interface.
(FR)
L'invention concerne des couplages capacitifs dans une interface à liaison directe de dispositifs micro-électroniques. Dans un mode de réalisation, un dispositif microélectronique comprend une première puce et une seconde puce liées directement l'une à l'autre au niveau d'une interface de liaison, une interconnexion conductrice entre la première puce et la seconde puce formée au niveau de l'interface de liaison par une liaison directe métal-métal, et une interconnexion capacitive entre la première puce et la seconde puce formée au niveau de l'interface de liaison. Un processus de liaison directe crée une liaison directe entre des surfaces diélectriques de deux puces, une liaison directe entre des interconnexions conductrices respectives des deux puces, et un couplage capacitif entre les deux puces au niveau de l'interface de liaison. Dans un mode de réalisation, un couplage capacitif de chaque ligne de signal au niveau de l'interface de liaison comprend un matériau diélectrique formant un condensateur au niveau de l'interface de liaison pour chaque ligne de signal. Les couplages capacitifs résultent du même processus de liaison directe qui crée les interconnexions conductrices liées directement entre elles au niveau de la même interface de liaison.
Also published as
Latest bibliographic data on file with the International Bureau