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1. WO2020117198 - LOGIC CIRCUITRY

Publication Number WO/2020/117198
Publication Date 11.06.2020
International Application No. PCT/US2018/063643
International Filing Date 03.12.2018
IPC
G06F 21/44 2013.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
30Authentication, i.e. establishing the identity or authorisation of security principals
44Program or device authentication
B41J 2/175 2006.01
BPERFORMING OPERATIONS; TRANSPORTING
41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
2Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
005characterised by bringing liquid or particles selectively into contact with a printing material
01Ink jet
17characterised by ink handling
175Ink supply systems
G06K 15/00 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
KRECOGNITION OF DATA; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
15Arrangements for producing a permanent visual presentation of the output data
G06F 13/42 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
38Information transfer, e.g. on bus
42Bus transfer protocol, e.g. handshake; Synchronisation
G06F 21/74 2013.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71to assure secure computing or processing of information
74operating in dual or compartmented mode, i.e. at least one secure mode
G06F 21/85 2013.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
82Protecting input, output or interconnection devices
85interconnection devices, e.g. bus-connected or in-line devices
CPC
G06F 21/44
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
30Authentication, i.e. establishing the identity or authorisation of security principals
44Program or device authentication
G06F 21/74
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71to assure secure computing or processing of information
74operating in dual or compartmented mode, i.e. at least one secure mode
G06F 21/85
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
82Protecting input, output or interconnection devices
85interconnection devices, e.g. bus-connected or in-line devices
Applicants
  • HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. [US]/[US]
Inventors
  • GARDNER, James Michael
  • LINN, Scott A.
  • PANSHIN, Stephen D.
  • WARD, Jefferson P.
  • ROETHIG, David Owen
Agents
  • PERRY, Garry A.
  • JASPER, Joseph T.
Priority Data
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) LOGIC CIRCUITRY
(FR) CIRCUIT LOGIQUE
Abstract
(EN)
In an example, a logic circuit comprising a communications interface including a data contact to communicate via a communications bus, an enablement contact, separate from the communication interface, to receive an input to enable the logic circuit, and at least one memory register, comprising at least one reconfigurable address register. The logic circuit may be configured, such that, when enabled, it responds to communications sent via the communication bus which are addressed to the address held in a reconfigurable address register.
(FR)
Dans un exemple, l'invention porte sur un circuit logique comprenant une interface de communication comprenant un contact de données pour communiquer par l'intermédiaire d'un bus de communication, un contact d'activation, distinct de l'interface de communication, pour recevoir une entrée pour activer le circuit logique, et au moins un registre de mémoire, comprenant au moins un registre d'adresse reconfigurable. Le circuit logique peut être configuré, de telle sorte que lorsqu'il est activé, il répond à des communications envoyées par l'intermédiaire du bus de communication qui sont adressées à l'adresse conservée dans un registre d'adresses reconfigurables.
Also published as
EP2018821926
Latest bibliographic data on file with the International Bureau