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1. WO2020116148 - METHOD FOR FORMING SEMICONDUCTOR LAYER

Publication Number WO/2020/116148
Publication Date 11.06.2020
International Application No. PCT/JP2019/045212
International Filing Date 19.11.2019
IPC
C30B 29/40 2006.01
CCHEMISTRY; METALLURGY
30CRYSTAL GROWTH
BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
29Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
10Inorganic compounds or compositions
40AIIIBV compounds
C30B 25/18 2006.01
CCHEMISTRY; METALLURGY
30CRYSTAL GROWTH
BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
25Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour deposition growth
02Epitaxial-layer growth
18characterised by the substrate
Applicants
  • 日本電信電話株式会社 NIPPON TELEGRAPH AND TELEPHONE CORPORATION [JP]/[JP]
Inventors
  • 中尾 亮 NAKAO, Ryo
  • 佐藤 具就 SATO, Tomonari
Agents
  • 山川 茂樹 YAMAKAWA, Shigeki
  • 小池 勇三 KOIKE, Yuzo
  • 山川 政樹 YAMAKAWA, Masaki
  • 本山 泰 MOTOYAMA, Yasushi
Priority Data
2018-22704404.12.2018JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) METHOD FOR FORMING SEMICONDUCTOR LAYER
(FR) PROCÉDÉ DE FORMATION D'UNE COUCHE SEMI-CONDUCTRICE
(JA) 半導体層の形成方法
Abstract
(EN)
Recesses (105, 106) that reach a first semiconductor layer (102) are respectively formed at places where threading dislocations (121, 122) reach a surface, and the first semiconductor layer (102) is oxidized through the respective recesses (105, 106) so as to form an insulating film (107) that covers the under surface of a second semiconductor layer (103).
(FR)
L’invention concerne des évidements (105, 106) atteignant une première couche semi-conductrice (102), qui sont respectivement formés à des endroits où des dislocations traversantes (121, 122) atteignent une surface, et la première couche semi-conductrice (102) étant oxydée par les évidements respectifs (105, 106) de manière à former un film isolant (107) qui recouvre la surface inférieure d'une seconde couche semi-conductrice (103).
(JA)
貫通転位(121),貫通転位(122)の表面に到達している箇所に、第1半導体層(102)に到達する窪み(105),窪み(106)を形成し、窪み(105),窪み(106)を通して第1半導体層(102)を酸化し、第2半導体層(103)の下面を覆う絶縁膜(107)を形成する。
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