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1. WO2020116107 - DISPLAY DEVICE AND SEMICONDUCTOR DEVICE

Publication Number WO/2020/116107
Publication Date 11.06.2020
International Application No. PCT/JP2019/044482
International Filing Date 13.11.2019
IPC
H01L 21/28 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H01L 29/786 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
786Thin-film transistors
G02F 1/1368 2006.01
GPHYSICS
02OPTICS
FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01for the control of the intensity, phase, polarisation or colour
13based on liquid crystals, e.g. single liquid crystal display cells
133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
1362Active matrix addressed cells
1368in which the switching element is a three-electrode device
CPC
G02F 1/1368
GPHYSICS
02OPTICS
FDEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating, or modulating; Non-linear optics
01for the control of the intensity, phase, polarisation or colour 
13based on liquid crystals, e.g. single liquid crystal display cells
133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
1362Active matrix addressed cells
1368in which the switching element is a three-electrode device
H01L 21/28
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
H01L 29/786
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
786Thin film transistors, ; i.e. transistors with a channel being at least partly a thin film
Applicants
  • 株式会社ジャパンディスプレイ JAPAN DISPLAY INC. [JP]/[JP]
Inventors
  • 花田 明紘 HANADA Akihiro
  • 神内 紀秀 JINNAI Toshihide
  • 渡壁 創 WATAKABE Hajime
  • 小野寺 涼 ONODERA Ryo
Agents
  • ポレール特許業務法人 POLAIRE I.P.C.
Priority Data
2018-22705004.12.2018JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) DISPLAY DEVICE AND SEMICONDUCTOR DEVICE
(FR) DISPOSITIF D'AFFICHAGE ET DISPOSITIF À SEMI-CONDUCTEUR
(JA) 表示装置および半導体装置
Abstract
(EN)
The purpose of the present invention is to provide a technology which enables reduction of the film thickness of a conductive layer that is used for the purpose of protecting a source region and a drain region of an oxide semiconductor. A semiconductor device according to the present invention comprises: a substrate; a first semiconductor layer of a polycrystalline silicon, which is provided above the substrate; a second semiconductor layer of an oxide semiconductor, which is provided above the first semiconductor layer; a conductive layer which covers the top of the edge of the second semiconductor layer, while being connected to the second semiconductor layer; a first contact hole which is provided so as to expose a part of the upper surface of the first semiconductor layer; a second contact hole which is provided so as to expose a part of the upper surface of the conductive layer; and an electrode wiring line which is provided in the first contact hole and the second contact hole. The conductive layer comprises: a first conductive film which is connected to the second semiconductor layer; and a second conductive film which is provided on or above the first conductive film. The second conductive film has resistance to a cleaning liquid that is used for cleaning within the first contact hole and the second contact hole.
(FR)
Le but de la présente invention est de fournir une technologie qui permet de réduire l'épaisseur de film d'une couche conductrice qui est utilisée dans le but de protéger une région de source et une région de drain d'un semi-conducteur à oxyde. Un dispositif à semi-conducteur selon la présente invention comprend : un substrat ; une première couche semi-conductrice d'un silicium polycristallin, qui est disposée au-dessus du substrat ; une seconde couche semi-conductrice d'un oxyde semi-conducteur, qui est disposée au-dessus de la première couche semi-conductrice ; une couche conductrice qui recouvre la partie supérieure du bord de la seconde couche semi-conductrice, tout en étant connectée à la seconde couche semi-conductrice ; un premier trou de contact qui est disposé de façon à exposer une partie de la surface supérieure de la première couche semi-conductrice ; un second trou de contact qui est disposé de façon à exposer une partie de la surface supérieure de la couche conductrice ; et une ligne de câblage d'électrode qui est disposée dans le premier trou de contact et le second trou de contact. La couche conductrice comprend : un premier film conducteur qui est connecté à la seconde couche semi-conductrice ; et un second film conducteur qui est disposé sur ou au-dessus du premier film conducteur. Le second film conducteur a une résistance à un liquide de nettoyage qui est utilisé pour le nettoyage à l'intérieur du premier trou de contact et du second trou de contact.
(JA)
本発明の目的は、酸化物半導体のソース領域およびドレイン領域を保護するための導電層の膜厚を薄くすることが可能な技術を提供することにある。半導体装置は、基板と、前記基板の上方に設けられた多結晶シリコンの第1半導体層と、前記第1半導体層よりも上方に設けられた酸化物半導体の第2半導体層と、前記第2半導体層の端部の上を覆い、かつ、前記第2半導体層に接続された導電層と、前記第1半導体層の上面の一部が露出するように設けられた第1コンタクトホールと、前記導電層の上面の一部が露出するように設けられた第2コンタクトホールと、前記第1コンタクトホールおよび前記第2コンタクトホールに設けられた電極配線と、を含む。前記導電層は、前記第2半導体層に接続された第1導電膜と、前記第1導電膜の上、または、上方に設けられた第2導電膜と、を含む。前記第2導電膜は、前記第1コンタクトホールおよび前記第2コンタクトホール内の洗浄に利用される洗浄液に対して耐性を有する。
Also published as
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