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1. WO2020115595 - SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE FABRICATION METHOD

Publication Number WO/2020/115595
Publication Date 11.06.2020
International Application No. PCT/IB2019/060011
International Filing Date 21.11.2019
IPC
H01L 29/786 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
786Thin-film transistors
H01L 21/28 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H01L 21/336 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
H01L 21/8239 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology
8239Memory structures
H01L 21/8242 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology
8239Memory structures
8242Dynamic random access memory structures (DRAM)
H01L 27/105 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
Applicants
  • 株式会社半導体エネルギー研究所 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. [JP]/[JP]
Inventors
  • 山崎舜平 YAMAZAKI, Shunpei
  • 菅谷健太郎 SUGAYA, Kentaro
  • 方堂涼太 HODO, Ryota
  • 牧野賢一郎 MAKINO, Kenichiro
  • 長塚修平 NAGATSUKA, Shuhei
Priority Data
2018-22997307.12.2018JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE FABRICATION METHOD
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET PROCÉDÉ DE FABRICATION D'UN DISPOSITIF À SEMI-CONDUCTEUR
(JA) 半導体装置、および半導体装置の作製方法
Abstract
(EN)
Provided is a semiconductor device having good electrical characteristics. The semiconductor device has a plurality of transistors, each of which has a first insulator, a first oxide, a second oxide, a first conductor, a second conductor, a third oxide, a second insulator, and a third conductor. In the channel width direction of the plurality of transistors, the third oxide of one of the plurality of transistors and the third oxide of another one of the plurality of transistors adjacent to said one of the plurality of transistors are provided so as to be separated from each other; the second insulator of one of the plurality of transistors has a region which is provided so as to be continuous with the second insulator of another one of the plurality of transistors adjacent to said one of the plurality of transistors; and the third conductor of one of the plurality of transistors has a region which is provided so as to be continuous with the third conductor of another one of the plurality of transistors adjacent to said one of the plurality of transistors.
(FR)
La présente invention concerne un dispositif à semi-conducteur ayant de bonnes caractéristiques électriques. Le dispositif à semi-conducteur comporte une pluralité de transistors, chacun ayant un premier isolant, un premier oxyde, un deuxième oxyde, un premier conducteur, un deuxième conducteur, un troisième oxyde, un second isolant et un troisième conducteur. Dans la direction de largeur de canal de la pluralité de transistors, le troisième oxyde d'un premier transistor de la pluralité de transistors et le troisième oxyde d'un autre transistor de la pluralité de transistors adjacents audit premier transistor de la pluralité de transistors sont disposés de manière à être séparés l'un de l'autre ; le second isolant d'un premier transistor de la pluralité de transistors comporte une région qui est disposée de manière à être continue avec le second isolant d'un autre transistor de la pluralité de transistors adjacents audit premier transistor de la pluralité de transistors ; et le troisième conducteur d'un premier transistor de la pluralité de transistors présente une région qui est disposée de manière à être continue avec le troisième conducteur d'un autre transistor de la pluralité de transistors adjacents audit premier transistor de la pluralité de transistors.
(JA)
良好な電気特性を有する半導体装置を提供する。 複数のトランジスタを有する半導体装置であって、複数のトランジスタは、それぞれ、第1の絶縁 体と、第1の酸化物と、第2の酸化物と、第1の導電体と、第2の導電体と、第3の酸化物と、第 2の絶縁体と、第3の導電体と、を有し、複数のトランジスタのチャネル幅方向において、複数の トランジスタの一が有する第3の酸化物と、複数のトランジスタの一に隣接する複数のトランジス タの別の一が有する第3の酸化物と、は、離間して設けられ、複数のトランジスタの一が有する第 2の絶縁体は、複数のトランジスタの一に隣接する複数のトランジスタの別の一が有する第2の絶 縁体と連続して設けられた領域を有し、複数のトランジスタの一が有する第3の導電体は、複数の トランジスタの一に隣接する複数のトランジスタの別の一が有する第3の導電体と連続して設けら れた領域を有する。
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