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1. WO2020114799 - CONTROLLED NOT GATE PARALLELIZATION IN QUANTUM COMPUTING SIMULATION

Publication Number WO/2020/114799
Publication Date 11.06.2020
International Application No. PCT/EP2019/082191
International Filing Date 22.11.2019
IPC
G06N 10/00 2019.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
NCOMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
10Quantum computers, i.e. computer systems based on quantum-mechanical phenomena
G06F 9/54 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
54Interprogram communication
CPC
B82Y 10/00
BPERFORMING OPERATIONS; TRANSPORTING
82NANOTECHNOLOGY
YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
10Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
G06F 9/30029
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30003Arrangements for executing specific machine instructions
30007to perform operations on data operands
30029Logical and Boolean instructions, e.g. XOR, NOT
G06F 9/455
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
44Arrangements for executing specific programs
455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
G06F 9/4881
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
48Program initiating; Program switching, e.g. by interrupt
4806Task transfer initiation or dispatching
4843by program, e.g. task dispatcher, supervisor, operating system
4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
G06F 9/5016
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
50Allocation of resources, e.g. of the central processing unit [CPU]
5005to service a request
5011the resources being hardware resources other than CPUs, Servers and Terminals
5016the resource being the memory
G06F 9/544
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
54Interprogram communication
544Buffers; Shared memory; Pipes
Applicants
  • INTERNATIONAL BUSINESS MACHINES CORPORATION [US]/[US]
  • IBM UNITED KINGDOM LIMITED [GB]/[GB] (MG)
Inventors
  • HORII, Hiroshi
  • CHIBA, Hitomi
Agents
  • WILLIAMS, Julian
Priority Data
16/211,44606.12.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) CONTROLLED NOT GATE PARALLELIZATION IN QUANTUM COMPUTING SIMULATION
(FR) PARALLÉLISATION DE GRILLE NON COMMANDÉE DANS UNE SIMULATION INFORMATIQUE QUANTIQUE
Abstract
(EN)
Techniques facilitating controlled NOT gate parallelization in quantum computing simulation are provided. A system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a selector component that can select a first qubit and a second qubit. The first qubit can be a control qubit. The computer executable components can also comprise a parallelization component that can reorder the first qubit with the second qubit and a replication component that can simulate a controlled NOT gate during the reordering by the parallelization component.
(FR)
L'invention concerne des techniques facilitant la parallélisation commandée de portes NON dans une simulation informatique quantique. Un système peut comprendre une mémoire qui stocke des composants exécutables par ordinateur, ainsi qu'un processeur qui exécute les composants exécutables par ordinateur stockés dans la mémoire. Les composants exécutables par ordinateur peuvent comprendre un composant sélecteur capable de sélectionner un premier bit quantique et un second bit quantique. Le premier bit quantique peut être un bit quantique de commande. Les composants exécutables par ordinateur peuvent également comprendre un composant de parallélisation qui permet de réordonner le premier bit quantique avec le second bit quantique, ainsi qu’un composant de réplication qui peut simuler une porte NON commandée lors du réordonnancement par le composant de parallélisation.
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