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1. WO2020113663 - NORMALLY-CLOSED GALLIUM OXIDE FIELD-EFFECT TRANSISTOR STRUCTURE AND PREPARATION METHOD THEREFOR

Publication Number WO/2020/113663
Publication Date 11.06.2020
International Application No. PCT/CN2018/121422
International Filing Date 17.12.2018
IPC
H01L 21/34 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
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21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
34the devices having semiconductor bodies not provided for in groups H01L21/06, H01L21/16, and H01L21/18159
H01L 21/44 2006.01
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LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
34the devices having semiconductor bodies not provided for in groups H01L21/06, H01L21/16, and H01L21/18159
44Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/36-H01L21/428158
H01L 29/778 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
778with two-dimensional charge carrier gas channel, e.g. HEMT
CPC
H01L 29/1029
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29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
10with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
1025Channel region of field-effect devices
1029of field-effect transistors
H01L 29/1033
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01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
10with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
1025Channel region of field-effect devices
1029of field-effect transistors
1033with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
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29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
402Field plates
H01L 29/66446
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29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66446with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
H01L 29/66522
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
66522with an active layer made of a group 13/15 material
H01L 29/78
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
Applicants
  • 中国电子科技集团公司第十三研究所 THE 13TH RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION [CN]/[CN]
Inventors
  • 吕元杰 LV, Yuanjie
  • 王元刚 WANG, Yuangang
  • 周幸叶 ZHOU, Xingye
  • 谭鑫 TAN, Xin
  • 宋旭波 SONG, Xubo
  • 梁士雄 LIANG, Shixiong
  • 冯志红 FENG, Zhihong
Agents
  • 石家庄国为知识产权事务所 SHIJIAZHUANG GOWELL INTELLECTUAL PROPERTY LAW FIRM
Priority Data
201811488059.406.12.2018CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) NORMALLY-CLOSED GALLIUM OXIDE FIELD-EFFECT TRANSISTOR STRUCTURE AND PREPARATION METHOD THEREFOR
(FR) STRUCTURE DE TRANSISTOR À EFFET DE CHAMP À OXYDE DE GALLIUM NORMALEMENT FERMÉE ET SON PROCÉDÉ DE PRÉPARATION
(ZH) 常关型氧化镓场效应晶体管结构及制备方法
Abstract
(EN)
A normally-closed gallium oxide field-effect transistor structure and a preparation method therefor, comprising a substrate layer (1, 11) and an n-type doped gallium oxide channel layer (2, 21, 22) from bottom to top. The n-type doped gallium oxide channel layer (2, 21, 22) is provided with a source (3), a drain (5), and a gate (4). The gate (4) is located between the source (3) and the drain (5). A no-electron channel region (6) is provided in the n-type doped gallium oxide channel layer (2, 21, 22) located below the gate (4). According to the normally-closed gallium oxide field-effect transistor structure, the no-electron channel region (6) is formed by means of high-temperature oxidation without preparing a groove below the gate (4), and the gate (4) is formed on the no-electron channel region (6), so as to avoid the problems of etching damage and uncontrollable etching depth, thereby improving the saturation current and breakdown voltage.
(FR)
L'invention concerne une structure de transistor à effet de champ à oxyde de gallium normalement fermée et son procédé de préparation, comprenant une couche de substrat (1, 11) et une couche de canal à oxyde de gallium dopé de type n (2, 21, 22) de bas en haut. La couche de canal à oxyde de gallium dopé de type n (2, 21, 22) comporte une source (3), un drain (5) et une grille (4). La grille (4) est située entre la source (3) et le drain (5). Une région de canal sans électrons (6) est disposée dans la couche de canal à oxyde de gallium dopé de type n (2, 21, 22) située au-dessous de la grille (4). Selon la structure de transistor à effet de champ à oxyde de gallium normalement fermée, la région de canal sans électrons (6) est formée au moyen d'une oxydation à haute température sans préparer une rainure au-dessous de la grille (4), et la grille (4) est formée sur la région de canal sans électrons (6), de manière à éviter les problèmes de détérioration de gravure et de profondeur de gravure non contrôlable, ce qui permet d'améliorer le courant de saturation et la tension de claquage.
(ZH)
一种常关型氧化镓场效应晶体管结构及制备方法,自下至上包括衬底层(1,11)和n型掺杂氧化镓沟道层(2,21,22),所述n型掺杂氧化镓沟道层(2,21,22)上设有源极(3)、漏极(5)和栅极(4),所述栅极(4)位于所述源极(3)和所述漏极(5)之间,所述栅极(4)下方的所述n型掺杂氧化镓沟道层(2,21,22)内设有无电子沟道区(6)。所述的常关型氧化镓场效应晶体管结构,无需在栅极(4)下制备凹槽,而是通过高温氧化形成无电子沟道区(6),在无电子沟道区(6)上形成栅极(4),避免了刻蚀损伤和刻蚀深度不可控的问题,提高了饱和电流和击穿电压。
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