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1. WO2020113560 - METHOD FOR PROGRAMMING MEMORY SYSTEM

Publication Number WO/2020/113560
Publication Date 11.06.2020
International Application No. PCT/CN2018/119801
International Filing Date 07.12.2018
IPC
G11C 16/10 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
10Programming or data input circuits
CPC
G11C 11/5628
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
56using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
5621using charge storage in a floating gate
5628Programming or writing circuits; Data input circuits
G11C 11/5635
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
56using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
5621using charge storage in a floating gate
5628Programming or writing circuits; Data input circuits
5635Erasing circuits
G11C 16/0408
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
04using variable threshold transistors, e.g. FAMOS
0408comprising cells containing floating gate transistors
G11C 16/10
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
10Programming or data input circuits
G11C 16/14
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
10Programming or data input circuits
14Circuits for erasing electrically, e.g. erase voltage switching circuits
G11C 16/32
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
32Timing circuits
Applicants
  • YANGTZE MEMORY TECHNOLOGIES CO., LTD. [CN]/[CN]
Inventors
  • LI, Haibo
  • TANG, Qiang
Agents
  • NTD UNIVATION INTELLECTUAL PROPERTY AGENCY LTD.
Priority Data
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) METHOD FOR PROGRAMMING MEMORY SYSTEM
(FR) PROCÉDÉ PERMETTANT DE PROGRAMMER UN SYSTÈME DE MÉMOIRE
Abstract
(EN)
A memory system includes a plurality of blocks of memory blocks, each including a plurality of memory cells. The method for programming the memory system includes during a program process, performing a first program operation to program a first memory block, waiting for a delay time after the first program operation is completed, after waiting for the delay time, performing an all-level threshold voltage test to determine if threshold voltages of the first memory block are greater than corresponding threshold voltages, and performing a second program operation to program the first memory block according to a result of the all-level threshold voltage test.
(FR)
L'invention concerne un système de mémoire qui comprend une pluralité de blocs de blocs de mémoire, comprenant chacun une pluralité de cellules de mémoire. Le procédé permettant de programmer un système de mémoire comprend, pendant un processus de programme, la réalisation d'une première opération de programme afin de programmer un premier bloc de mémoire, l'attente d'un temps de retard après que la première opération de programme est terminée, après avoir attendu le temps de retard, la réalisation d'un test de tension de seuil de tout niveau afin de déterminer si des tensions de seuil du premier bloc de mémoire sont supérieures à des tensions de seuil correspondantes, et la réalisation d'une seconde opération de programme afin de programmer le premier bloc de mémoire selon un résultat du test de tension de seuil de tout niveau.
Also published as
CN201880002854.X
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