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1. WO2020113175 - CMOS RF POWER LIMITER AND ESD PROTECTION CIRCUITS

Publication Number WO/2020/113175
Publication Date 04.06.2020
International Application No. PCT/US2019/063868
International Filing Date 29.11.2019
IPC
H01L 27/02 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H04B 1/18 2006.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
BTRANSMISSION
1Details of transmission systems, not covered by a single one of groups H04B3/-H04B13/123; Details of transmission systems not characterised by the medium used for transmission
06Receivers
16Circuits
18Input circuits, e.g. for coupling to an antenna or a transmission line
H03G 11/02 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
GCONTROL OF AMPLIFICATION
11Limiting amplitude; Limiting rate of change of amplitude
02by means of diodes
CPC
H01L 27/0288
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
0203Particular design considerations for integrated circuits
0248for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
0251for MOS devices
0288using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
H03F 1/26
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
1Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
26Modifications of amplifiers to reduce influence of noise generated by amplifying elements
H03F 3/21
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
3Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
21with semiconductor devices only
H03G 11/006
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
GCONTROL OF AMPLIFICATION
11Limiting amplitude; Limiting rate of change of amplitude ; ; Clipping in general
006in circuits having distributed constants
H04B 1/18
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
BTRANSMISSION
1Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
06Receivers
16Circuits
18Input circuits, e.g. for coupling to an antenna or a transmission line
Applicants
  • OCTOTECH, INC. [US]/[US]
Inventors
  • GORBACHOV, Oleksandr
  • ZHANG, Lisette
  • MILKOVITS, Stephen
Agents
  • KARICH, Eric
Priority Data
62/772,98929.11.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) CMOS RF POWER LIMITER AND ESD PROTECTION CIRCUITS
(FR) LIMITEUR DE PUISSANCE RF CMOS ET CIRCUITS DE PROTECTION CONTRE LES DÉCHARGES ÉLECTROSTATIQUES
Abstract
(EN)
An RF power limiter and ESD protection circuit has a set of two CMOS FETs each configured to perform a diode function with a defined forward voltage and arranged in an anti-parallel configuration and coupled between the input terminal and the ground terminal. When an RF signal is applied symmetrically to the input terminal and ground terminal it becomes symmetrically attenuated when the signal level exceeds the defined forward voltage of the diode configured CMOS FETs. In the ESD protection mode one of the CMOS FETs acts as a grounded gate NMOS transistor with SCR action to provide for mitigation of voltage and current over-stress of transistors utilized in RF transceiver circuits. Generally, the circuit architectures allow input power levels to be limited to an extent that reliable operation can be maintained.
(FR)
L'invention concerne un limiteur de puissance RF et un circuit de protection contre les décharges électrostatiques comprenant un ensemble de deux transistors à effet de champ CMOS configurés chacun pour réaliser une fonction de diode avec une tension directe définie et agencés dans une configuration antiparallèle et couplés entre la borne d'entrée et la borne de terre. Lorsqu'un signal RF est appliqué de manière symétrique à la borne d'entrée et à la borne de terre, il devient atténué de manière symétrique lorsque le niveau de signal dépasse la tension directe définie des transistors à effet de champ CMOS configurés en tant que diode. Dans le mode de protection contre les décharges électrostatiques, l'un des transistors à effet de champ CMOS fonctionne comme un transistor NMOS à grille mise à la terre ayant un effet de redresseur au silicium pour atténuer les contraintes excessives de tension et d'intensité de transistors utilisés dans des circuits émetteurs/récepteurs RF. D'une manière générale, les architectures de circuit permettent de limiter les niveaux de puissance d'entrée à une valeur permettant de maintenir un fonctionnement fiable.
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