Processing

Please wait...

Settings

Settings

Goto Application

1. WO2020112559 - PER CURSOR LOGICAL UNIT NUMBER SEQUENCING

Note: Text based on automatic Optical Character Recognition processes. Please use the PDF version for legal matters

[ EN ]

CLAIMS

What is claimed is:

1. A system comprising:

a plurality of memory components; and

a processing device, coupled to the plurality of memory components, the processing device to:

identify generators used to generate a plurality of sequences of logical unit numbers (LUN) for a set of LUNs associated with the plurality of memory components;

assign each of a plurality of cursors a respective one of the generators, wherein the cursors are used to perform a memory operation on the plurality of memory components;

identify a sequence of the plurality of sequences of LUNs for each of the cursors based on the respective generator assigned to the cursors; and

perform the memory operation on the plurality of memory components using the plurality of sequences of LUNs, wherein each of the cursors performs the memory operation on the set of LUNs in an order provided by the sequence of LUNs that is associated with each of the cursors.

2. The system of claim 1, wherein each of the sequences of LUNs is a unique sequence of LUNs.

3. The system of claim 1, wherein to identify the sequence of the plurality of sequences of LUNs for each of the cursors based on the respective generator assigned to the cursors, the processing device is further to:

implement an operation that uses the respective generator as a variable to generate the sequence of LUNs.

4. The system of claim 3, wherein to implement the operation that uses the respective generator as the variable to generate the sequence of LUNs, the processing device is further to:

perform the operation on each of a plurality of multiples of the respective generator using a number of LUNs in the set of LUNs to generate a first value, wherein the first value identifies a LUN in the sequence of LUNs.

5. The system of claim 1, the processing device is further to:

determine a sequence of channels for each of the plurality of sequences of LUNs, wherein channels couple the processing device to the set of LUNs of the plurality of memory components, wherein the cursors perform the memory operation on the set of LUNs in the order provided by the sequence of LUNs by accessing the set of LUNs in an order provided by the respective sequence of channels.

6. The system of claim 5, wherein to determine the sequence of channels for each of the plurality of sequences of LUNs, for each sequence of the plurality of sequences of LUNs, the processing device is further to:

perform an operation on each number in the sequence of LUNs using a number of channels to be used to generate a second value, wherein the second value identifies a channel in the sequence of channels.

7. The system of claim 1, wherein the memory operation is a write operation to write data from a host system to the plurality of memory components.

8. The system of claim 7, wherein the write operation stripes the data across the plurality of memory components.

9. The system of claim 1, wherein the plurality of cursors comprise a plurality of host cursors to perform a write operation on behalf of a host system.

10. The system of claim 1, wherein each of the generators is a unique integer in a range from one to a number of LUNs in the set of LUNs.

11. The system of claim 1, wherein each of the plurality of sequences of LUNs references a single instance of each LUN in the set of LUNs.

12. The system of claim 1, wherein performing the memory operation on the plurality of memory components in the order provided by the plurality of sequences of LUNs reduces a probability of collision by the cursors in the performance of the memory operation.

13. The system of claim 1, wherein the plurality of memory components comprises non volatile memory devices.

14. A method, comprising:

identifying generators used to generate a plurality of sequences of logical unit numbers (LUN) for a set of LUNs associated with a plurality of memory components;

assigning each of a plurality of cursors a respective one of the generators, wherein the cursors are used to perform a memory operation on the plurality of memory components; identifying a sequence of the plurality of sequences of LUNs for each of the cursors based on the respective generator assigned to the cursors; and

performing, by a processing device, the memory operation on the plurality of memory components using the plurality of sequences of LUNs, wherein each of the cursors performs the memory operation on the set of LUNs in an order provided by the sequence of LUNs that is associated with each of the cursors.

15. The method of claim 14, wherein to identifying the sequence of the plurality of sequences of LUNs for each of the cursors based on the respective generator assigned to the cursors, the method further comprises:

implementing an operation that uses the respective generator as a variable to generate the sequence of LUNs.

16. The method of claim 15, wherein implementing the operation that uses the respective generator as the variable to generate the sequence of LUNs, the method further comprising: perform the operation on each of a plurality of multiples of the respective generator using a number of LUNs in the set of LUNs to generate a first value, wherein the first value identifies a LUN in the sequence of LUNs.

17. The method of claim 14, further comprising:

determining a sequence of channels for each of the plurality of sequences of LUNs, wherein channels couple the processing device to the set of LUNs of the plurality of memory components, wherein the cursors perform the memory operation on the set of LUNs in the order provided by the sequence of LUNs by accessing the set of LUNs in an order provided by the respective sequence of channels.

18. A non-transitory computer-readable medium comprising instructions that, responsive to execution by a processing device, cause the processing device to perform operations comprising:

identifying generators used to generate a plurality of sequences of logical unit numbers (LUN) for a set of LUNs associated with a plurality memory components;

assigning each of a plurality of cursors a respective one of the generators, wherein the cursors are used to perform a memory operation on the plurality of memory components; identifying a sequence of the plurality of sequences of LUNs for each of the cursors based on the respective generator assigned to the cursors; and

performing, by the processing device, the memory operation on the plurality of memory components using the plurality of sequences of LUNs, wherein each of the cursors performs the memory operation on the set of LUNs in an order provided by the sequence of LUNs that is associated with each of the cursors.

19. The non-transitory computer-readable medium of claim 18, wherein to identifying the sequence of the plurality of sequences of LUNs for each of the cursors based on the respective generator assigned to the cursors, the operations further comprising:

implementing an operation that uses the respective generator as a variable to generate the sequence of LUNs.

20. The non-transitory computer-readable medium of claim 19, wherein implementing the operation that uses the respective generator as the variable to generate the sequence of LUNs, the operations further comprising:

performing the operation on each of a plurality of multiples of the respective generator using a number of LUNs in the set of LUNs to generate a first value, wherein the first value identifies a LUN in the sequence of LUNs.

21. The non-transitory computer-readable medium of claim 18, the operations further comprising:

determining a sequence of channels for each of the plurality of sequences of LUNs, wherein channels couple the processing device to the set of LUNs of the plurality of memory components, wherein the cursors perform the memory operation on the set of LUNs in the order provided by the sequence of LUNs by accessing the set of LUNs in an order provided by the respective sequence of channels.

22. A system comprising:

a plurality of memory components; and

a processing device, coupled to the plurality of memory components, the processing device to:

assign each of a plurality of cursors a respective generator of a plurality of generators, wherein the cursors are used to perform a memory operation on a set of logical unit numbers (LUN) associated with the plurality of memory components;

identify a plurality of sequences of LUNs based on the plurality of generators, wherein each of the cursors is associated with one of the plurality of the sequences of LUNs; and

perform the memory operation on the set of LUNs associated with the plurality of memory components using the plurality of sequences of LUNs, wherein performing the memory operation on the set of LUNs in an order provided by the plurality of sequences of LUNs reduces a probability of collision by the cursors in the performance of the memory operation.

23. The system of claim 22, wherein each of the sequences of LUNs is a unique sequence of LUNs.

24. The system of claim 22, wherein to identify the sequence of the plurality of sequences of LUNs for each of the cursors based on the respective generator assigned to the cursors, the processing device is further to:

implement an operation that uses the respective generator as a variable to generate the sequence of LUNs.

25. The system of claim 24, wherein to implement the operation that uses the respective generator as the variable to generate the sequence of LUNs, the processing device is further to:

perform the operation on each of a plurality of multiples of the respective generator using a number of LUNs in the set of LUNs to generate a first value, wherein the first value identifies a LUN in the sequence of LUNs.