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1. WO2020112340 - METHODS FOR FORMING PATTERNED INSULATING LAYERS ON CONDUCTIVE LAYERS AND DEVICES MANUFACTURED USING SUCH METHODS

Publication Number WO/2020/112340
Publication Date 04.06.2020
International Application No. PCT/US2019/060815
International Filing Date 12.11.2019
IPC
G02B 26/00 2006.01
GPHYSICS
02OPTICS
BOPTICAL ELEMENTS, SYSTEMS, OR APPARATUS
26Optical devices or arrangements using movable or deformable optical elements for controlling the intensity, colour, phase, polarisation or direction of light, e.g. switching, gating or modulating
H01L 21/027 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
027Making masks on semiconductor bodies for further photolithographic processing, not provided for in group H01L21/18 or H01L21/34165
H01L 21/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L 27/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
CPC
G02B 26/00
GPHYSICS
02OPTICS
BOPTICAL ELEMENTS, SYSTEMS, OR APPARATUS
26Optical devices or arrangements using movable or deformable optical elements for controlling the intensity, colour, phase, polarisation or direction of light, e.g. switching, gating, modulating
H01L 21/00
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
H01L 21/027
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
Applicants
  • CORNING INCORPORATED [US]/[US]
Inventors
  • WYNNE, Thomas M.
Agents
  • HOOD, Michael A.
Priority Data
62/771,33726.11.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) METHODS FOR FORMING PATTERNED INSULATING LAYERS ON CONDUCTIVE LAYERS AND DEVICES MANUFACTURED USING SUCH METHODS
(FR) PROCÉDÉS DE FORMATION DE COUCHES ISOLANTES À MOTIFS SUR DES COUCHES CONDUCTRICES ET DISPOSITIFS FABRIQUÉS À L'AIDE DE TELS PROCÉDÉS
Abstract
(EN)
A method for forming a patterned insulating layer on a conductive layer can include removing an annular region of an insulating layer overlying a perimeter of an opening in a mask by laser ablation. The mask can be removed from the conductive layer to remove an excess portion of the insulating layer disposed on the mask, whereby a remaining portion of the insulating layer defines the patterned insulating layer disposed on the central region of the conductive layer, and a surrounding region of the conductive layer surrounding the central region of the conductive layer is uncovered by the patterned insulating layer.
(FR)
Le procédé de formation d'une couche isolante à motifs sur une couche conductrice peut comprendre l'élimination d'une région annulaire d'une couche isolante recouvrant un périmètre d'une ouverture dans un masque par ablation laser. Le masque peut être retiré de la couche conductrice pour retirer une partie excédentaire de la couche isolante disposée sur le masque, une partie restante de la couche isolante délimitant la couche isolante à motifs disposée sur la région centrale de la couche conductrice, et une région environnante de la couche conductrice entourant la région centrale de la couche conductrice n'es pas couverte par la couche isolante à motifs.
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