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1. WO2020112294 - INVERTING PHASE-MODE LOGIC FLIP-FLOPS

Publication Number WO/2020/112294
Publication Date 04.06.2020
International Application No. PCT/US2019/058797
International Filing Date 30.10.2019
IPC
H03K 19/195 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
02using specified components
195using superconductive devices
H03K 3/38 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
3Circuits for generating electric pulses; Monostable, bistable or multistable circuits
02Generators characterised by the type of circuit or by the means used for producing pulses
38by the use, as active elements, of superconductive devices
CPC
H03K 19/1954
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output
02using specified components
195using superconductive devices
1954with injection of the control current
H03K 19/23
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output
20characterised by logic function, e.g. AND, OR, NOR, NOT circuits
23Majority or minority circuits, i.e. giving output having the state of the majority or the minority of the inputs
H03K 3/38
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
3Circuits for generating electric pulses; Monostable, bistable or multistable circuits
02Generators characterised by the type of circuit or by the means used for producing pulses
38by the use, as active elements, of superconductive devices
Applicants
  • NORTHROP GRUMMAN SYSTEMS CORPORATION [US]/[US]
Inventors
  • BRAUN, Alexander Louis
Agents
  • HARRIS, Christopher P.
Priority Data
16/205,95930.11.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) INVERTING PHASE-MODE LOGIC FLIP-FLOPS
(FR) BASCULES LOGIQUES À MODE DE PHASE INVERSÉE
Abstract
(EN)
An inverting reciprocal quantum logic (RQL) phase-mode D flip-flop (300) accepts a data input (Dl) and a logical clock input (LCLKI). The flip-flop includes a stacked Josephson junction (J3) and a comparator (J5, J4). The triggering or untriggering of the stacked Josephson junction (J3) by positive or negative single flux quantum (SFQ) pulses (Dl) can switch a direction of DC bias current through a component of the comparator (through J4), such as an output Josephson junction (J4), which can then either pass or suppress logical clock SFQ pulses (LCLKI). When so passed, the data input is captured to the output (QNO) upon clocking the flip-flop via the provision of the logical clock SFQ pulses, e.g., as reciprocal pulse pairs (pulse positive, pulse negative).
(FR)
L'invention concerne une bascule (300) D en mode phase à logique quantique inversée (RQL) qui accepte une entrée de données (DI) et une entrée d'horloge logique (LCLKI). La bascule comprend une jonction Josephson empilée (J3) et un comparateur (J5, J4). Le déclenchement ou le désenclenchement de la jonction Josephson empilée (J3) par des impulsions (DI) quantiques à flux unique (SFQ) positives ou négatives peut commuter une direction de courant de polarisation CC à travers un composant du comparateur (par J4), telle qu'une jonction Josephson de sortie (J4), qui peut ensuite passer ou supprimer des impulsions SFQ d'horloge logique (LCLKI). Lorsqu'elle est passée, l'entrée de données est capturée à la sortie (QNO) lors du cadencement de la bascule par l'intermédiaire de la fourniture des impulsions SFQ d'horloge logique, par exemple, en tant que paires d'impulsions réciproques (impulsion positive, impulsion négative).
Also published as
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