Processing

Please wait...

Settings

Settings

Goto Application

1. WO2020110195 - COUPLING LOOP CIRCUIT, NOISE FILTER CIRCUIT, AND CIRCUIT GENERATION METHOD

Publication Number WO/2020/110195
Publication Date 04.06.2020
International Application No. PCT/JP2018/043557
International Filing Date 27.11.2018
IPC
H03H 7/09 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
7Multiple-port networks comprising only passive electrical elements as network components
01Frequency selective two-port networks
09Filters comprising mutual inductance
H01F 17/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
17Fixed inductances of the signal type
H01L 21/822 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
H01L 27/04 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
CPC
H01F 17/00
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
17Fixed inductances of the signal type
H01L 21/822
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
H01L 27/04
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
H03H 7/09
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
7Multiple-port networks comprising only passive electrical elements as network components
01Frequency selective two-port networks
09Filters comprising mutual inductance
Applicants
  • 三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP]/[JP]
Inventors
  • 米田 諭 YONEDA, Satoshi
  • 廣瀬 健二 HIROSE, Kenji
Agents
  • 田澤 英昭 TAZAWA, Hideaki
  • 濱田 初音 HAMADA, Hatsune
  • 中島 成 NAKASHIMA, Nari
  • 坂元 辰哉 SAKAMOTO, Tatsuya
  • 辻岡 将昭 TSUJIOKA, Masaaki
  • 井上 和真 INOUE, Kazuma
Priority Data
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) COUPLING LOOP CIRCUIT, NOISE FILTER CIRCUIT, AND CIRCUIT GENERATION METHOD
(FR) CIRCUIT DE BOUCLE DE COUPLAGE, CIRCUIT DE FILTRE DE BRUIT ET PROCÉDÉ DE GÉNÉRATION DE CIRCUIT
(JA) 結合ループ回路、ノイズフィルタ回路及び回路生成方法
Abstract
(EN)
A coupling loop circuit (10) is configured such that: a sixth conductor (16) is made to cross a second conductor (12) at a different level; an eighth conductor (18) is made to cross each of the second conductor (12) and a fourth conductor (14) at a different level; a first loop area (61) and a second loop area (62) overlap one another spatially; and an overlapping area (63), which is an overlap between the first loop area (61) and the second loop area (62), is formed by the second conductor (12), the fourth conductor (14), the sixth conductor (16), and the eighth conductor (18).
(FR)
Circuit de boucle de couplage (10) conçu de telle sorte que : un sixième conducteur (16) est amené à croiser un second conducteur (12) à un niveau différent ; un huitième conducteur (18) est amené à croiser le deuxième conducteur (12) et un quatrième conducteur (14) respectivement à un niveau différent ; une première zone de boucle (61) et une seconde zone de boucle (62) se chevauchent spatialement ; et une zone de chevauchement (63), qui est un chevauchement entre la première zone de boucle (61) et la seconde zone de boucle (62), est formée par le second conducteur (12), le quatrième conducteur (14), le sixième conducteur (16) et le huitième conducteur (18).
(JA)
第6の導体(16)が、第2の導体(12)と立体交差され、第8の導体(18)が、第2の導体(12)及び第4の導体(14)のそれぞれと立体交差され、第1のループ領域(61)と第2のループ領域(62)とが空間的に重なっており、第1のループ領域(61)と第2のループ領域(62)との重なり領域(63)が、第2の導体(12)、第4の導体(14)、第6の導体(16)及び第8の導体(18)によって形成されているように、結合ループ回路(10)を構成した。
Latest bibliographic data on file with the International Bureau