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1. WO2020109025 - CACHED RESULT USE THROUGH QUANTUM GATE REWRITE

Publication Number WO/2020/109025
Publication Date 04.06.2020
International Application No. PCT/EP2019/081374
International Filing Date 14.11.2019
IPC
G06N 10/00 2019.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
NCOMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
10Quantum computers, i.e. computer systems based on quantum-mechanical phenomena
CPC
G06F 12/0215
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
0215with look ahead addressing means
G06F 12/0802
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
G06F 2212/654
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
65Details of virtual memory and virtual address translation
654Look-ahead translation
G06N 10/00
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
NCOMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
10Quantum computers, i.e. computer systems based on quantum-mechanical phenomena
Applicants
  • INTERNATIONAL BUSINESS MACHINES CORPORATION [US]/[US]
  • IBM UNITED KINGDOM LIMITED [GB]/[GB] (MG)
Inventors
  • GUNNELS, John
  • WEGMAN, Mark
  • KAMINSKY, David
  • GAMBETTA, Jay
  • JAVADIABHARI, Ali
  • MCKAY, David
Agents
  • FOURNIER, Kevin
Priority Data
16/201,27927.11.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) CACHED RESULT USE THROUGH QUANTUM GATE REWRITE
(FR) UTILISATION D'UN RÉSULTAT MIS EN MÉMOIRE CACHE PAR RÉÉCRITURE DE PORTE QUANTIQUE
Abstract
(EN)
Techniques facilitating cached result use through quantum gate rewrite are provided. In one example, a computer- implemented method comprises converting, by a device operatively coupled to a processor, an input quantum circuit to a normalized form, resulting in a normalized quantum circuit; detecting, by the device, a match between the normalized quantum circuit and a cached quantum circuit among a set of cached quantum circuits; and providing, by the device, a cached run result of the cached quantum circuit based on the detecting.
(FR)
L'invention concerne des techniques facilitant l'utilisation d'un résultat mis en mémoire cache par réécriture de porte quantique. Dans un exemple, un procédé mis en œuvre par ordinateur consiste à : convertir, au moyen d’un dispositif couplé fonctionnellement à un processeur, un circuit quantique d'entrée avec une forme normalisée, ce qui permet d’obtenir un circuit quantique normalisé ; détecter, au moyen du dispositif, une correspondance entre le circuit quantique normalisé et un circuit quantique mis en mémoire cache parmi un ensemble de circuits quantiques mis en mémoire cache ; et fournir, au moyen du dispositif, un résultat d'exécution mis en mémoire cache du circuit quantique mis en mémoire cache d’après la détection.
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