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1. WO2020108602 - CHIP MOLDING STRUCTURE, WAFER LEVEL CHIP SCALE PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF

Publication Number WO/2020/108602
Publication Date 04.06.2020
International Application No. PCT/CN2019/121909
International Filing Date 29.11.2019
IPC
H01L 23/31 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulation, e.g. encapsulating layers, coatings
31characterised by the arrangement
H01L 21/78 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
H01L 21/56 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56Encapsulations, e.g. encapsulating layers, coatings
CPC
H01L 21/561
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
561Batch processing
H01L 21/568
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
568Temporary substrate used as encapsulation process aid
H01L 21/78
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
H01L 2225/06565
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2225Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/00
06503Stacked arrangements of devices
06555Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
06565the devices having the same size and there being no auxiliary carrier between the devices
H01L 23/3107
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
31characterised by the arrangement ; or shape
3107the device being completely enclosed
H01L 25/0657
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; ; Multistep manufacturing processes thereof
03all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/00
0657Stacked arrangements of devices
Applicants
  • CHANGXIN MEMORY TECHNOLOGIES, INC. [CN]/[CN]
Inventors
  • CHUANG, Ling-Yi
  • LIN, Dingyou
Agents
  • SHANGHAI SAVVY INTELLECTUAL PROPERTY AGENCY
Priority Data
201811459386.730.11.2018CN
201822028036.730.11.2018CN
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) CHIP MOLDING STRUCTURE, WAFER LEVEL CHIP SCALE PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF
(FR) STRUCTURE DE MOULAGE DE PUCE, STRUCTURE D'ENCAPSULATION SUR TRANCHES ET SON PROCÉDÉ DE FABRICATION
Abstract
(EN)
A chip molding structure, a wafer level chip scale packaging structure and manufacturing methods thereof are disclosed, relating to the technical field of semiconductor production. The method of making a wafer level chip scale packaging structure includes: providing a wafer, comprising a plurality of bottom chips; bonding the wafer with a carrier; dicing the wafer to separate the plurality of bottom chips from a plurality of peripheral portions; removing the plurality of peripheral portions; and molding the plurality of bottom chips with a mold to form the molding structure. By dicing the wafer into independent bottom chips and peripheral portions, with the peripheral portions being removed before molding, the bottom chips may be prevented from being damaged during the molding. Compared with existing technologies, the packaging quality and production yield are improved.
(FR)
L'invention concerne une structure de moulage de puce, une structure d'encapsulation sur tranches et ses procédés de fabrication, se rapportant au domaine technique de la production de semi-conducteurs. Le procédé de fabrication d'une structure d'encapsulation sur tranches comprend : la fourniture d'une tranche, comprenant une pluralité de puces inférieures ; la liaison de la tranche avec un support ; le découpage en dés de la tranche pour séparer la pluralité de puces inférieures d'une pluralité de parties périphériques ; le retrait de la pluralité de parties périphériques ; et le moulage de la pluralité de puces inférieures avec un moule pour former la structure de moulage. En découpant en dés la tranche en puces inférieures indépendantes et en parties périphériques, les parties périphériques étant retirées avant le moulage, il est possible d'empêcher que les puces inférieures ne soient endommagées pendant le moulage. Par rapport aux technologies existantes, la qualité d'encapsulation et le rendement de production sont améliorés.
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