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1. WO2020108097 - METHOD FOR HOLDING ULTRA-THIN SEMICONDUCTOR WAFER IN SEMICONDUCTOR INTEGRATION PROCESS

Publication Number WO/2020/108097
Publication Date 04.06.2020
International Application No. PCT/CN2019/109969
International Filing Date 08.10.2019
IPC
H01L 21/683 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
683for supporting or gripping
CPC
H01L 21/6835
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
683for supporting or gripping
6835using temporarily an auxiliary support
H01L 2221/68359
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683for supporting or gripping
68304using temporarily an auxiliary support
68359used as a support during manufacture of interconnect decals or build up layers
H01L 2221/68381
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2221Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
683for supporting or gripping
68304using temporarily an auxiliary support
68381Details of chemical or physical process used for separating the auxiliary support from a device or wafer
Applicants
  • 南京中电芯谷高频器件产业技术研究院有限公司 NANJING GMINNOVATION TECHNOLOGY CO.LTD [CN]/[CN]
Inventors
  • 戴家赟 DAI, Jiayun
  • 吴立枢 WU, Lishu
  • 王飞 WANG, Fei
  • 郭怀新 GUO, Huaixin
  • 陈堂胜 CHEN, Tangsheng
Agents
  • 南京苏高专利商标事务所(普通合伙) NANJING SUGAO PATENT AND TRADEMARK FIRM(ORDINARY PARTNERSHIP)
Priority Data
201811413696.526.11.2018CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) METHOD FOR HOLDING ULTRA-THIN SEMICONDUCTOR WAFER IN SEMICONDUCTOR INTEGRATION PROCESS
(FR) PROCÉDÉ DE MAINTIEN D'UNE TRANCHE DE SEMI-CONDUCTEUR ULTRA-MINCE DANS UN PROCESSUS D'INTÉGRATION DE SEMI-CONDUCTEUR
(ZH) 一种用于半导体集成工艺中超薄半导体晶圆的拿持方法
Abstract
(EN)
The present application discloses a method for holding an ultra-thin semiconductor wafer (1) in a semiconductor integration process. The main steps comprise: 1) spin-coating a first temporary bonding adhesive (3) on a front surface of a first temporary carrier (2); 2) bonding a front surface of an ultra-thin semiconductor wafer to the front surface of the first temporary carrier; 3) spin-coating a second temporary bonding adhesive (5) on a front surface of a second temporary carrier (4); 4) bonding a rear surface of the ultra-thin semiconductor wafer to the front surface of the second temporary carrier; 5) separating the ultra-thin semiconductor wafer from the first temporary carrier; 6) fabricating an integrated interconnection structure; 7) performing a bonding integration process; and 8) separating the integrated wafer from the second carrier. Two types of temporary bonding adhesives having different softening temperatures are used in conjunction with two temporary carriers, and a temporary bonding process and a bonding release process are used, thereby ensuring that the ultra-thin semiconductor wafer is supported by the temporary carrier during three-dimensional integration processes such as transferring, holding, interconnection structure fabrication, and bonding, and effectively reducing the risk of wafer cracking during the integration process.
(FR)
La présente invention concerne un procédé de maintien d'une tranche de semi-conducteur ultra-mince (1) dans un processus d'intégration de semi-conducteur. Les principales étapes consistent : 1) à déposer par rotation un premier adhésif de liaison temporaire (3) sur une surface avant d'un premier support temporaire (2); 2) à lier une surface avant d'une tranche de semi-conducteur ultra-mince à la surface avant du premier support temporaire; 3) à déposer par rotation un second adhésif de liaison temporaire (5) sur une surface avant d'un second support temporaire (4); 4) à lier une surface arrière de la tranche de semi-conducteur ultra-mince à la surface avant du second support temporaire; 5) à séparer la tranche de semi-conducteur ultra-mince du premier support temporaire; 6) à fabriquer une structure d'interconnexion intégrée; 7) à réaliser un processus d'intégration de liaison; et 8) à séparer la tranche intégrée du second support. Deux types d'adhésifs de liaison temporaire ayant des points de ramollissement différents sont utilisés conjointement avec deux supports temporaires, et un processus de liaison temporaire et un processus de libération de liaison sont utilisés, ce qui permet d'assurer le maintien de la tranche de semi-conducteur ultra-mince par le support temporaire pendant des processus d'intégration tridimensionnelle tels que le transfert, le maintien, la fabrication de structure d'interconnexion, et la liaison, et de réduire efficacement le risque de fissuration de tranche pendant le processus d'intégration.
(ZH)
本申请公开了一种用于半导体集成工艺中超薄半导体晶圆(1)的拿持方法,主要步骤有:1)在第一临时载片(2)正面旋涂第一临时键合粘附剂(3);2)将超薄半导体晶圆与第一临时载片正面相对键合;3)在第二临时载片(4)正面旋涂第二临时键合粘附剂(5);4)将超薄半导体晶圆背面与第二临时载片正面相对键合;5)将超薄半导体晶圆与第一临时载片分离;6)制备集成互连结构(6);7)进行键合集成工艺;8)将集成后的晶圆与第二载片分离。通过两种不同软化温度的临时键合粘附剂以及两片临时载片的搭配使用,利用临时键合和解键合工艺,保证超薄半导体晶圆在传输、夹取、互连结构制作以及键合等三维集成工艺过程中均有临时载片支撑,有效降低集成工艺中裂片的风险。
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