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1. WO2020072321 - DATA ERASURE IN MEMORY SUB-SYSTEMS

Publication Number WO/2020/072321
Publication Date 09.04.2020
International Application No. PCT/US2019/053590
International Filing Date 27.09.2019
IPC
G06F 3/06 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from, or digital output to, record carriers
CPC
G06F 3/0608
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers, ; e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0602specifically adapted to achieve a particular effect
0608Saving storage space on storage systems
G06F 3/064
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers, ; e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0628making use of a particular technique
0638Organizing or formatting or addressing of data
064Management of blocks
G06F 3/0652
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers, ; e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0628making use of a particular technique
0646Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
0652Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
G06F 3/0688
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers, ; e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0668adopting a particular infrastructure
0671In-line storage system
0683Plurality of storage devices
0688Non-volatile semiconductor memory arrays
H04L 9/0891
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
9Cryptographic mechanisms or cryptographic; arrangements for secret or secure communication
08Key distribution ; or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
0891Revocation or update of secret information, e.g. encryption key update or rekeying
H04L 9/0894
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
9Cryptographic mechanisms or cryptographic; arrangements for secret or secure communication
08Key distribution ; or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
0894Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage
Applicants
  • MICRON TECHNOLOGY, INC. [US]/[US]
Inventors
  • BRANDT, Kevin R.
  • VAN EATON, Thomas Cougar
Agents
  • PERDOK, Monique M.
  • ARORA, Suneel / U.S. Reg. No. 42,267
  • BEEKMAN, Marvin / U.S. Reg. No. 38,377
  • BLACK, David W. / U.S. Reg. No. 42,331
  • LANG, Roger / U.S. Reg. No. 58,829
  • SCHEER, Bradley W. / U.S. Reg. No. 47,059
Priority Data
16/148,56401.10.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) DATA ERASURE IN MEMORY SUB-SYSTEMS
(FR) EFFACEMENT DE DONNÉES DANS DES SOUS-SYSTÈMES DE MÉMOIRE
Abstract
(EN)
Various examples are directed to memory systems comprising a component and a processing device. The memory system may comprise a plurality of blocks. A first portion of the plurality of blocks may be retired and a second portion of the plurality of blocks may be unretired. The processing device receives a sanitize operation for the plurality of blocks. The processing device initiates a first erase cycle at a first retired block of the plurality of blocks. The processing device determines that the first erase cycle was not successful and sets an erase indicator to false.
(FR)
Divers exemples concernent des systèmes de mémoire comprenant un composant et un dispositif de traitement. Le système de mémoire peut comprendre une pluralité de blocs. Une première partie de la pluralité de blocs peut être retirée et une seconde partie de la pluralité de blocs peut être non retirée. Le dispositif de traitement reçoit une opération d'assainissement pour la pluralité de blocs. Le dispositif de traitement déclenche un premier cycle d'effacement au niveau d'un premier bloc retiré de la pluralité de blocs. Le dispositif de traitement détermine que le premier cycle d'effacement n'a pas réussi et définit un indicateur d'effacement sur Faux.
Also published as
Latest bibliographic data on file with the International Bureau