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1. WO2020068699 - SYSTEMS AND METHODS OF MASKING DURING HIGH-ENERGY IMPLANTATION WHEN FABRICATING WIDE BAND GAP SEMICONDUCTOR DEVICES

Publication Number WO/2020/068699
Publication Date 02.04.2020
International Application No. PCT/US2019/052487
International Filing Date 23.09.2019
IPC
H01L 21/82 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
H01L 21/02 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
H01L 21/225 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
22Diffusion of impurity materials, e.g. doping materials, electrode materials, into, or out of, a semiconductor body, or between semiconductor regions; Redistribution of impurity materials, e.g. without introduction or removal of further dopant
225using diffusion into, or out of, a solid from or into a solid phase, e.g. a doped oxide layer
H01L 29/78 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
H01L 29/73 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
70Bipolar devices
72Transistor-type devices, i.e. able to continuously respond to applied control signals
73Bipolar junction transistors
H01L 29/66 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
CPC
H01L 21/02529
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02365Forming inorganic semiconducting materials on a substrate
02518Deposited layers
02521Materials
02524Group 14 semiconducting materials
02529Silicon carbide
H01L 21/0465
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
0445the devices having semiconductor bodies comprising crystalline silicon carbide
0455Making n or p doped regions or layers, e.g. using diffusion
046using ion implantation
0465using masks
H01L 21/306
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
302to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
306Chemical or electrical treatment, e.g. electrolytic etching
H01L 29/0634
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
0603characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
0607for preventing surface leakage or controlling electric field concentration
0611for increasing or controlling the breakdown voltage of reverse biased devices
0615by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
063Reduced surface field [RESURF] pn-junction structures
0634Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
H01L 29/1608
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
12characterised by the materials of which they are formed
16including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
1608Silicon carbide
H01L 29/4236
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
42312Gate electrodes for field effect devices
42316for field-effect transistors
4232with insulated gate
42356Disposition, e.g. buried gate electrode
4236within a trench, e.g. trench gate electrode, groove gate electrode
Applicants
  • GENERAL ELECTRIC COMPANY [US]/[US]
Inventors
  • HAWKINS, William Gregg
  • GHANDI, Reza
  • BAUER, Christopher
  • LU, Shaoxin
Agents
  • RARIDEN, John M.
  • SWANSON, Tait R.
  • MANWARE, Robert A.
  • FLETCHER, Michael G.
  • YODER, Patrick S.
  • POWELL, W. Allen
  • BAKKER, Jila
  • SINCLAIR, JR., Steven J.
  • OSTERHAUS, Matthew G.
  • DOOLEY, Matthew C.
  • KANTOR, Andrew L.
  • HENWOOD, Matthew C.
  • WIMMER, Lance G.
  • THOMAS, Jim
Priority Data
16/147,22728.09.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SYSTEMS AND METHODS OF MASKING DURING HIGH-ENERGY IMPLANTATION WHEN FABRICATING WIDE BAND GAP SEMICONDUCTOR DEVICES
(FR) SYSTÈMES ET PROCÉDÉS DE MASQUAGE PENDANT UNE IMPLANTATION À HAUTE ÉNERGIE LORS DE LA FABRICATION DE DISPOSITIFS À SEMI-CONDUCTEURS À LARGE BANDE INTERDITE
Abstract
(EN)
The subject matter disclosed herein relates to wide band gap semiconductor power devices and, more specifically, to high-energy implantation masks used in forming silicon carbide (SiC) power devices, such as charge balanced (CB) SiC power devices. An intermediate semiconductor device structure (126) includes a SiC substrate layer (36) having a first conductivity type and silicon carbide (SiC) epitaxial (epi) layer (34) having the first conductivity type disposed on the SiC substrate layer (36). The intermediate device structure (126) also includes a silicon high-energy implantation mask (SiHEIM) (40) disposed directly on a first portion of the SiC epi layer (34) and having a thickness between 5 micrometers (µm) and 20 µm. The SiHEIM (40) is configured to block implantation of the first portion of the SiC epi layer (34) during a high-energy implantation process having an implantation energy greater than 500 kiloelectron volts (keV).
(FR)
La présente invention concerne des dispositifs de puissance à semi-conducteurs à large bande interdite et, plus particulièrement, des masques d'implantation à haute énergie utilisés lors de la formation de dispositifs de puissance au carbure de silicium (SiC), tels que des dispositifs de puissance au SiC à équilibrage de charge (CB). Une structure de dispositif à semi-conducteurs intermédiaire (126) comprend une couche de substrat de SiC (36) ayant un premier type de conductivité et une couche épitaxiale de carbure de silicium (SiC) (34) ayant le premier type de conductivité disposée sur la couche de substrat de SiC (36). La structure de dispositif intermédiaire (126) comprend également un masque d'implantation à haute énergie de silicium (SiHEIM) (40) disposé directement sur une première partie de la couche épitaxiale de SiC (34) et ayant une épaisseur comprise entre 5 micromètres (µm) et 20 µm. Le SiHEIM (40) est conçu pour bloquer l'implantation de la première partie de la couche épitaxiale de SiC (34) pendant un processus d'implantation à haute énergie ayant une énergie d'implantation supérieure à 500 kiloélectrons volts (keV).
Also published as
Latest bibliographic data on file with the International Bureau