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1. WO2020068230 - TRANSMITTER CIRCUITRY WITH N-TYPE PULL-UP TRANSISTOR AND LOW OUTPUT VOLTAGE SWING

Publication Number WO/2020/068230
Publication Date 02.04.2020
International Application No. PCT/US2019/039599
International Filing Date 27.06.2019
IPC
H03K 19/017 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
01Modifications for accelerating switching
017in field-effect transistor circuits
H03K 19/00 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
CPC
G06F 1/28
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
28Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
G11C 11/4093
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
401forming cells needing refreshing or charge regeneration, i.e. dynamic cells
4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
407for memory cells of the field-effect type
409Read-write [R-W] circuits 
4093Input/output [I/O] data interface arrangements, e.g. data buffers
G11C 7/10
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
G11C 7/1057
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
1057Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
G11C 7/1084
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
1078Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
1084Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
H03K 17/6872
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
17Electronic switching or gating, i.e. not by contact-making and –breaking
51characterised by the components used
56by the use, as active elements, of semiconductor devices
687the devices being field-effect transistors
6871the output circuit comprising more than one controlled field-effect transistor
6872using complementary field-effect transistors
Applicants
  • INTEL CORPORATION [US]/[US]
Inventors
  • SRIDHARAN, Harishankar
  • TYAMGONDLU, Karthik
Agents
  • MUGHAL, Usman A.
Priority Data
16/144,94427.09.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) TRANSMITTER CIRCUITRY WITH N-TYPE PULL-UP TRANSISTOR AND LOW OUTPUT VOLTAGE SWING
(FR) CIRCUITS D'ÉMETTEUR AVEC TRANSISTOR D'EXCURSION HAUTE DE TYPE N ET EXCURSION DE TENSION DE SORTIE FAIBLE
Abstract
(EN)
An apparatus is provided, where the apparatus includes a first transistor coupled between a supply node and an output node; a resistor and a second transistor coupled in series between the output node and a ground terminal; a circuitry to receive data, and to output a first control signal and a second control signal to respectively control the first transistor and the second transistor, wherein an output signal at the output node is indicative of the data, and wherein the first transistor is a N-type transistor.
(FR)
L'invention concerne un appareil, l'appareil comprenant un premier transistor couplé entre un noeud d'alimentation et un noeud de sortie ; une résistance et un second transistor couplés en série entre le noeud de sortie et une borne de terre ; des circuits pour recevoir des données et pour délivrer en sortie un premier signal de commande et un second signal de commande pour commander respectivement le premier transistor et le second transistor, un signal de sortie au niveau du noeud de sortie étant indicatif des données, et le premier transistor étant un transistor de type N.
Also published as
Latest bibliographic data on file with the International Bureau