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1. WO2020065961 - DISPLAY DEVICE

Publication Number WO/2020/065961
Publication Date 02.04.2020
International Application No. PCT/JP2018/036446
International Filing Date 28.09.2018
IPC
G09G 3/3233 2016.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
22using controlled light sources
30using electroluminescent panels
32semiconductive, e.g. using light-emitting diodes
3208organic, e.g. using organic light-emitting diodes
3225using an active matrix
3233with pixel circuitry controlling the current through the light-emitting element
G09G 3/20 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
CPC
G09G 3/20
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix ; no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
G09G 3/3233
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix ; no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
22using controlled light sources
30using electroluminescent panels
32semiconductive, e.g. using light-emitting diodes [LED]
3208organic, e.g. using organic light-emitting diodes [OLED]
3225using an active matrix
3233with pixel circuitry controlling the current through the light-emitting element
Applicants
  • シャープ株式会社 SHARP KABUSHIKI KAISHA [JP]/[JP]
Inventors
  • 岡部 達 OKABE, Tohru
  • 家根田 剛士 YANEDA, Takeshi
Agents
  • 特許業務法人HARAKENZO WORLD PATENT & TRADEMARK HARAKENZO WORLD PATENT & TRADEMARK
Priority Data
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) DISPLAY DEVICE
(FR) DISPOSITIF D'AFFICHAGE
(JA) 表示装置
Abstract
(EN)
A display device comprises: a pixel circuit including a driving transistor (T1) and a capacitor (Cp) electrically connected to a control terminal of the driving transistor; a light emitting single element (ES); a first power supply voltage line (PF(n)) crossing a data signal line (SL(m)); and a second power supply voltage line (PS(m)) electrically connected to the control terminal through the capacitor, wherein during a writing period in which a scanning signal line (GL (n)) is active, the first power supply voltage line and a second conduction terminal of the driving transistor do not conduct, and the first power supply voltage line and the second conduction terminal of the driving transistor conduct during a light emission period of a light emitting element.
(FR)
La présente invention concerne un dispositif d'affichage qui comprend : un circuit de pixels comprenant un transistor d'attaque (T1) et un condensateur (Cp) électriquement connecté à une borne de commande du transistor d'attaque ; un élément électroluminescent unique (ES) ; une première ligne de tension d'alimentation électrique (PF(n)) croisant une ligne de signal de données (SL(m)) ; et une seconde ligne de tension d'alimentation électrique (PS(m)) électriquement connectée à la borne de commande par l'intermédiaire du condensateur, pendant une période d'écriture dans laquelle une ligne de signal de balayage (GL(n)) est active, la première ligne de tension d'alimentation électrique et une seconde borne de conduction du transistor d'attaque n'étant pas conductrices et la première ligne de tension d'alimentation électrique et la seconde borne de conduction du transistor d'attaque conduisent pendant une période d'émission de lumière d'un élément électroluminescent.
(JA)
駆動トランジスタ(T1)および駆動トランジスタの制御端子に電気的に接続するコンデンサ(Cp)を含む画素回路と、発光個素子(ES)と、データ信号線(SL(m))と交差する第1電源電圧線(PF(n))と、コンデンサを介して前記制御端子に電気的に接続する第2電源電圧線(PS(m))とを備え、走査信号線(GL(n))がアクティブとなる書き込み期間は、第1電源電圧線と駆動トランジスタの第2導通端子とが導通せず、発光素子の発光期間内に、第1電源電圧線と駆動トランジスタの第2導通端子とが導通する。
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