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1. WO2020065250 - AN APPARATUS AND METHOD FOR PREDICTING SOURCE OPERAND VALUES AND OPTIMIZED PROCESSING OF INSTRUCTIONS

Publication Number WO/2020/065250
Publication Date 02.04.2020
International Application No. PCT/GB2019/051999
International Filing Date 17.07.2019
IPC
G06F 9/38 2018.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
G06F 9/30 2018.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
CPC
G06F 9/30007
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30003Arrangements for executing specific machine instructions
30007to perform operations on data operands
G06F 9/3016
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30145Instruction analysis, e.g. decoding, instruction word fields
3016Decoding the operand specifier, e.g. specifier format
G06F 9/30181
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30181Instruction operation extension or modification
G06F 9/3832
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
3824Operand accessing
383Operand prefetching
3832Value prediction for operands; operand history buffers
G06F 9/3836
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
G06F 9/384
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
3838Dependency mechanisms, e.g. register scoreboarding
384Register renaming
Applicants
  • ARM LIMITED [GB]/[GB]
Inventors
  • GREENHALGH, Peter Richard
  • PIRY, Frederic Claude Marie
  • CAULFIELD, Ian Michael
  • TONNERRE, Albin Pierrick
Agents
  • HORNER, David
Priority Data
1815654.726.09.2018GB
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) AN APPARATUS AND METHOD FOR PREDICTING SOURCE OPERAND VALUES AND OPTIMIZED PROCESSING OF INSTRUCTIONS
(FR) APPAREIL ET PROCÉDÉ DE PRÉDICTION DE VALEURS D'OPÉRANDE SOURCE ET TRAITEMENT OPTIMISÉ D'INSTRUCTIONS
Abstract
(EN)
An apparatus and method are provided for processing instructions. The apparatus has execution circuitry for executing instructions, where each instruction requires an associated operation to be performed using one or more source operand values in order to produce a result value. Issue circuitry is used to maintain a record of pending instructions awaiting execution by the execution circuitry, and prediction circuitry is used to produce a predicted source operand value for a chosen pending instruction. Optimisation circuitry is then arranged to detect an optimisation condition for the chosen pending instruction when the predicted source operand value is such that, having regard to the associated operation for the chosen pending instruction, the result value is known without performing the associated operation. In response to detection of the optimisation condition, an optimisation operation is implemented instead of causing the execution circuitry to perform the associated operation in order to execute the chosen pending instruction. This can lead to significant performance and/or power consumption improvements.
(FR)
La présente invention concerne un appareil et un procédé de traitement d'instructions. L'appareil comprend un ensemble de circuits d'exécution pour exécuter des instructions, chaque instruction nécessitant une opération associée à réaliser à l'aide d'au moins une valeur d'opérande source afin de produire une valeur de résultat. Des ensembles de circuit d'émission sont utilisés pour maintenir un enregistrement d'instructions en attente attendant une exécution au moyen de l'ensemble de circuits d'exécution, et un ensemble de circuits de prédiction est utilisé pour produire une valeur d'opérande source prédite pour une instruction en attente choisie. Un ensemble de circuits d'optimisation est ensuite agencé pour détecter une condition d'optimisation pour l'instruction en attente choisie lorsque la valeur d'opérande source prédite est telle que, concernant l'opération associée pour l'instruction en attente choisie, la valeur de résultat est connue sans exécuter l'opération associée. En réponse à la détection de la condition d'optimisation, une opération d'optimisation est mise en œuvre au lieu d'amener l'ensemble de circuits d'exécution à réaliser l'opération associée afin d'exécuter l'instruction en attente choisie. Cela peut conduire à des améliorations de consommation d'énergie et/ou une performance significative.
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