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1. WO2020062409 - PHASE INVERTER AND GOA CIRCUIT

Publication Number WO/2020/062409
Publication Date 02.04.2020
International Application No. PCT/CN2018/113253
International Filing Date 01.11.2018
IPC
G09G 3/36 2006.01
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
34by control of light from an independent source
36using liquid crystals
CPC
G09G 2310/0267
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2310Command of the display device
02Addressing, scanning or driving the display screen or processing steps related thereto
0264Details of driving circuits
0267Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
G09G 3/20
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix ; no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
H01L 27/1214
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
Applicants
  • 武汉华星光电技术有限公司 WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN]/[CN]
Inventors
  • 余华伦 YU, Hualun
Agents
  • 深圳翼盛智成知识产权事务所(普通合伙) ESSEN PATENT & TRADEMARK AGENCY
Priority Data
201811144369.429.09.2018CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) PHASE INVERTER AND GOA CIRCUIT
(FR) INVERSEUR DE PHASE ET CIRCUIT GOA
(ZH) 反相器及 GOA 电路
Abstract
(EN)
Disclosed is a phase inverter, comprising: a first thin film transistor (T1), including: a first substrate (10); at least one first buffer layer formed on the first substrate (10); and a first polycrystalline silicon layer formed on a part of the at least one first buffer layer; and a second thin film transistor (T2), including: a second substrate (30); at least one second buffer layer formed on a second light shading layer (32); and a second polycrystalline silicon layer formed on a part of the at least one second buffer layer. The first thin film transistor (T1) further comprises a first light shading layer (12) formed between the first substrate and the at least one first buffer layer; and/or the second thin film transistor further comprises a second light shading layer formed between the second substrate and at least one second buffer layer. Further provided is a GOA circuit.
(FR)
L'invention concerne un inverseur de phase, comprenant : un premier transistor à couches minces (T1), comprenant : un premier substrat (10) ; au moins une première couche tampon formée sur le premier substrat (10) ; et une première couche de silicium polycristallin formée sur une partie de ladite première couche tampon ; et un second transistor à couches minces (T2), comprenant : un second substrat (30) ; au moins une seconde couche tampon formée sur une seconde couche d'atténuation de lumière (32) ; et une seconde couche de silicium polycristallin formée sur une partie de ladite seconde couche tampon. Le premier transistor à couches minces (T1) comprend en outre une première couche d'atténuation de lumière (12) formée entre le premier substrat et ladite première couche tampon ; et/ou le second transistor à couches minces comprend en outre une seconde couche d'atténuation de lumière formée entre le second substrat et ladite seconde couche tampon. L'invention concerne également un circuit GOA.
(ZH)
一种反相器,包括:第一薄膜晶体管(T1),包括:第一基板(10);至少一第一缓冲层,形成于第一基板(10)上;以及第一多晶硅层,形成于至少一第一缓冲层上的一部分;以及第二薄膜晶体管(T2),包括:第二基板(30);至少一第二缓冲层,形成于第二遮光层(32)上;以及第二多晶硅层,形成于至少一第二缓冲层上的一部分。该第一薄膜晶体管(T1)进一步包括第一遮光层(12)形成于第一基板及至少一第一缓冲层之间,及/或第二薄膜晶体管进一步包括第二遮光层形成于第二基板及至少一第二缓冲层之间。还提供了一种GOA电路。
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