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1. WO2020008304 - SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

Publication Number WO/2020/008304
Publication Date 09.01.2020
International Application No. PCT/IB2019/055427
International Filing Date 27.06.2019
IPC
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8239
Memory structures
8242
Dynamic random access memory structures (DRAM)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
8232
Field-effect technology
8234
MIS technology
8239
Memory structures
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
108
Dynamic random access memory structures
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H01L 21/8242 (2006.01)
H01L 21/8239 (2006.01)
H01L 27/105 (2006.01)
H01L 27/108 (2006.01)
H01L 29/786 (2006.01)
CPC
H01L 21/8239
H01L 27/105
H01L 27/108
H01L 29/786
Applicants
  • 株式会社半導体エネルギー研究所 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. [JP/JP]; 神奈川県厚木市長谷398 398, Hase, Atsugi-shi, Kanagawa 2430036, JP
Inventors
  • 岡本悟 OKAMOTO, Satoru; JP
  • 徳丸亮 TOKUMARU, Ryo; JP
  • 方堂涼太 HODO, Ryota; JP
Priority Data
2018-12891106.07.2018JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEURS ET PROCÉDÉ DE FABRICATION DE DISPOSITIF À SEMI-CONDUCTEURS
(JA) 半導体装置、および半導体装置の作製方法
Abstract
(EN)
Provided is a semiconductor device which can be miniaturized or highly integrated. The present invention has: an oxide; a first conductor and a second conductor spaced apart from each other on the oxide; a third conductor provided on the oxide and having a region overlapping a region between the first conductor and the second conductor; a first insulator on the third conductor; a fourth conductor electrically connected to the first conductor through a first opening provided in the first insulator; a second insulator provided on the first insulator and provided on the fourth conductor inside the first opening; a fifth conductor that overlaps the fourth conductor with the second insulator sandwiched therebetween inside the first opening; and a sixth conductor electrically connected to the second conductor inside a second opening provided in the first insulator and the second insulator, wherein the fifth conductor and the sixth conductor are in contact with the upper surface of the second insulator on the first insulator.
(FR)
La présente invention concerne un dispositif à semi-conducteurs pouvant être miniaturisé ou faire l'objet d'une haute intégration. La présente invention fait appel à : un oxyde ; un premier conducteur et un deuxième conducteur espacés l'un de l'autre sur l'oxyde ; un troisième conducteur disposé sur l'oxyde et dont une région chevauche une région séparant le premier conducteur du deuxième conducteur ; un premier isolant sur le troisième conducteur ; un quatrième conducteur connecté électriquement au premier conducteur par l'intermédiaire d'une première ouverture ménagée dans le premier isolant ; un second isolant disposé sur le premier isolant et disposé sur le quatrième conducteur à l'intérieur de la première ouverture ; un cinquième conducteur qui chevauche le quatrième conducteur, le second isolant étant pris en sandwich entre eux à l'intérieur de la première ouverture ; et un sixième conducteur connecté électriquement au deuxième conducteur à l'intérieur d'une seconde ouverture ménagée dans le premier isolant et le second isolant, le cinquième conducteur et le sixième conducteur étant en contact avec la surface supérieure du second isolant sur le premier isolant.
(JA)
微細化または高集積化が可能な半導体装置を提供する。 酸化物と、 酸化物上に、 お互いに離間して設けられた第1の導電体、 および第2の導電体と、 酸化物上、 かつ第1の導電体と第2の導電体の間の領域と重畳する領域を有する第3の導電体と、 第3の導電体上の第1の絶縁体と、 第1の絶縁体に設けられた第1の開口を介して、 第1の導電体と電気的に接続する第4の導電体と、 第1の絶縁体上に設けられ、 かつ第1の開口内部で第4の導電体上に設けられた第2の絶縁体と、 第1の開口内部で、 第2の絶縁体を間に挟み、 第4の導電体と重畳する第5の導電体と、 第1の絶縁体、 および第2の絶縁体に設けられた第2の開口内で第2の導電体と電気的に接続する第6の導電体と、 を有し、 第5の導電体、 および第6の導電体は、 第1の絶縁体上において、第2の絶縁体の上面と接する。
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