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1. WO2020007077 - ARRAY SUBSTRATE AND FABRICATION METHOD THEREFOR, AND DISPLAY DEVICE

Publication Number WO/2020/007077
Publication Date 09.01.2020
International Application No. PCT/CN2019/080600
International Filing Date 29.03.2019
IPC
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
H01L 27/12 (2006.01)
H01L 21/77 (2017.01)
CPC
H01L 21/77
H01L 27/12
H01L 27/1222
H01L 27/127
H01L 29/786
H01L 29/78672
Applicants
  • 京东方科技集团股份有限公司 BOE TECHNOLOGY GROUP CO., LTD. [CN/CN]; 中国北京市 朝阳区酒仙桥路10号 No.10 Jiuxianqiao Rd. Chaoyang District Beijing 100015, CN
Inventors
  • 刘利宾 LIU, Libin; CN
  • 杨倩 YANG, Qian; CN
Agents
  • 北京市柳沈律师事务所 LIU, SHEN & ASSOCIATES; 中国北京市 海淀区彩和坊路10号1号楼10层 10th Floor, Building 1 10 Caihefang Road, Haidian District Beijing 100080, CN
Priority Data
201810710254.002.07.2018CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) ARRAY SUBSTRATE AND FABRICATION METHOD THEREFOR, AND DISPLAY DEVICE
(FR) SUBSTRAT MATRICIEL ET PROCÉDÉ DE FABRICATION ASSOCIÉ AINSI QUE DISPOSITIF D'AFFICHAGE
(ZH) 阵列基板及其制作方法、显示装置
Abstract
(EN)
An array substrate and a fabrication method therefor, and a display device. The array substrate, comprising: a base substrate (100); a first thin film transistor (200) that is located on the base substrate (100) and comprises a first active layer (210); and a second thin film transistor (300) that is located on the base substrate (100) and comprises a second active layer (310), wherein a base material of the first active layer (210) is the same as a base material of the second active layer (310), and the first active layer (210) and the second active layer (310) meet at least one of the following conditions: the carrier mobility of the first active layer (210) is greater than the carrier mobility of the second active layer (310), and the carrier concentration of the first active layer (210) is greater than the carrier concentration of the second active layer (310). The foregoing array substrate may compensate for a difference in threshold voltages due to a difference in channel width to length ratios of different thin film transistors by means of adjusting the carrier mobility or concentration of thin film transistors in different regions.
(FR)
La présente invention concerne un substrat matriciel et un procédé de fabrication associé ainsi qu’un dispositif d’affichage. Le substrat matriciel comprend : un substrat de base (100) ; un premier transistor à couches minces (200) situé sur le substrat de base (100) et comprenant une première couche active (210) ; et un second transistor à couches minces (300) situé sur le substrat de base (100) et comprenant une seconde couche active (310). Selon l'invention, un matériau de base de la première couche active (210) est identique à un matériau de base de la seconde couche active (310), et la première couche active (210) et la seconde couche active (310) satisfont au moins l'une des conditions suivantes : la mobilité de porteurs de la première couche active (210) est supérieure à la mobilité de porteurs de la seconde couche active (310), et la concentration de porteurs de la première couche active (210) est supérieure à la concentration de porteurs de la seconde couche active (310). Le substrat matriciel susmentionné peut compenser une différence de tensions de seuil due à une différence de rapport de largeur à longueur des canaux de différents transistors à couches minces au moyen d'un ajustement de la mobilité ou de la concentration de porteurs de transistors à couches minces dans des régions différentes.
(ZH)
一种阵列基板及其制作方法、显示装置。阵列基板,包括:衬底基板(100);第一薄膜晶体管(200),位于衬底基板(100)上,且包括第一有源层(210);以及第二薄膜晶体管(300),位于衬底基板(100)上,且包括第二有源层(310),第一有源层(210)的基体材料和第二有源层(310)的基体材料相同,且第一有源层(210)和第二有源层(310)满足以下条件至少之一:第一有源层(210)的载流子迁移率大于第二有源层(310)的载流子迁移率,以及第一有源层(210)的载流子浓度大于第二有源层(310)的载流子浓度。该阵列基板通过调节不同区域的薄膜晶体管的载流子迁移率或浓度,可以补偿因不同薄膜晶体管沟道宽长比差异导致的阈值电压的差异。
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