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1. WO2020005388 - HIGH VOLTAGE (HV) METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) IN SEMICONDUCTOR ON INSULATOR (SOI) TECHNOLOGY

Publication Number WO/2020/005388
Publication Date 02.01.2020
International Application No. PCT/US2019/030938
International Filing Date 06.05.2019
IPC
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H01L 29/40 (2006.01)
H01L 29/78 (2006.01)
H01L 29/786 (2006.01)
CPC
H01L 21/28035
H01L 21/76251
H01L 27/1203
H01L 29/0865
H01L 29/0882
H01L 29/0886
Applicants
  • QUALCOMM INCORPORATED [US/US]; ATTN: International IP Administration 5775 Morehouse Drive San Diego, California 92121-1714, US
Inventors
  • LIANG, Qingqing; US
  • VEDULA, Ravi Pramod Kumar; US
  • KUMARASAMY, Sivakumar; US
  • IMTHURN, George Pete; US
  • GOKTEPELI, Sinan; US
Agents
  • LENKIN, Alan M.; US
  • LUTZ, Joseph; US
  • PARTOW-NAVID, Puya; US
  • FASHU-KANU, Alvin V.; US
Priority Data
16/156,72910.10.2018US
62/690,13626.06.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) HIGH VOLTAGE (HV) METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET) IN SEMICONDUCTOR ON INSULATOR (SOI) TECHNOLOGY
(FR) TRANSISTOR À EFFET DE CHAMP MÉTAL-OXYDE SEMI-CONDUCTEUR (MOSFET) HAUTE TENSION (HV) DANS UNE TECHNOLOGIE DE SEMI-CONDUCTEUR SUR ISOLANT (SOI)
Abstract
(EN)
An integrated circuit is described. The integrated circuit includes a metal oxide semiconductor field effect transistor (MOSFET). The MOSFET is on a first surface of an insulator layer of the integrated circuit. The MOSFET including a source region, a drain region, and a front gate. The MOSFET also includes an extended drain region between the drain region and a well proximate the front gate. The integrated circuit also includes back gates on a second surface opposite the first surface of the insulator layer. The back gates are overlapped by the extended drain region.
(FR)
La présente invention concerne un circuit intégré comprenant un transistor à effet de champ métal-oxyde semi-conducteur (MOSFET). Le MOSFET est disposé sur une première surface d'une couche isolante du circuit intégré et comprend une zone de source, une zone de drain et une grille avant, et comprend également une zone de drain étendue entre la zone de drain et un puits à proximité de la grille avant. Le circuit intégré comprend en outre des grilles arrière sur une seconde surface opposée à la première surface de la couche isolante. Les grilles arrière sont chevauchées par la zone de drain étendue.
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