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1. (WO2020004484) IMAGE FORMING DEVICE
Latest bibliographic data on file with the International BureauSubmit observation

Pub. No.: WO/2020/004484 International Application No.: PCT/JP2019/025427
Publication Date: 02.01.2020 International Filing Date: 26.06.2019
IPC:
B41J 2/447 (2006.01) ,B41J 2/45 (2006.01) ,G03G 15/04 (2006.01) ,H01L 33/62 (2010.01)
B PERFORMING OPERATIONS; TRANSPORTING
41
PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
J
TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
2
Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
435
characterised by selective application of radiation to a printing material or impression-transfer material
447
using arrays of radiation sources
B PERFORMING OPERATIONS; TRANSPORTING
41
PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
J
TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
2
Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
435
characterised by selective application of radiation to a printing material or impression-transfer material
447
using arrays of radiation sources
45
using light-emitting diode arrays
G PHYSICS
03
PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
G
ELECTROGRAPHY; ELECTROPHOTOGRAPHY; MAGNETOGRAPHY
15
Apparatus for electrographic processes using a charge pattern
04
for exposing, i.e. imagewise exposure by optically projecting the original image on a photoconductive recording material
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48
characterised by the semiconductor body packages
62
Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
Applicants:
キヤノン株式会社 CANON KABUSHIKI KAISHA [JP/JP]; 東京都大田区下丸子3丁目30番2号 30-2, Shimomaruko 3-chome, Ohta-ku, Tokyo 1468501, JP
Inventors:
関 広高 SEKI Hirotaka; JP
Agent:
岡部 讓 OKABE Yuzuru; JP
越智 隆夫 OCHI Takao; JP
Priority Data:
2018-12182327.06.2018JP
Title (EN) IMAGE FORMING DEVICE
(FR) DISPOSITIF DE FORMATION D'IMAGE
(JA) 画像形成装置
Abstract:
(EN) An odd number of surface light emitting element array chips 1 to 29 are mounted on a drive board 202, an even number of the surface light emitting element array chips 2, 4, ..., 28 from among the odd number of surface light emitting element array chips 1 to 29 are disposed on one side in an intersecting direction, and the remaining odd number of surface light emitting element array chips 1, 3, ..., 29 from among the odd number of surface light emitting element array chips are disposed on the other side in the intersecting direction, and the position of a light emission center is moved further toward the side of a printed circuit board 202 on which the even number of surface light emitting element array chips 2, 4, ..., 28 are disposed than the lateral center of the board. In this way, an increase in the size of the printed circuit board can be suppressed, and congestion of the wiring on the printed circuit board can be suppressed, even if an odd number of light emitting element arrays are disposed on the printed circuit board.
(FR) L’invention concerne un nombre impair de puces à matrice d'éléments électroluminescents de surface (1 à 29) montées sur une carte de commande (202), un nombre pair des puces à matrice d'éléments électroluminescents de surface (2, 4.., 28) parmi le nombre impair de puces à matrice d'éléments électroluminescents de surface(1 à 29) étant disposées sur un côté dans une direction de croisement, et le nombre impair restant de puces à matrice d'éléments électroluminescents de surface (1, 3.., 29) parmi le nombre impair de puces à matrice d'éléments électroluminescents de surface étant disposées de l'autre côté dans la direction de croisement, et la position d'un centre d’émission de lumière étant davantage décalée du côté d'une carte de circuit imprimé (202) sur laquelle le nombre pair de puces à matrice d'éléments électroluminescents de surface (2, 4.., 28) sont disposées que le centre latéral de la carte. Ainsi, il est possible de supprimer une augmentation de la taille de la carte de circuit imprimé, il est également possible de supprimer l’accumulation de câblage sur la carte de circuit imprimé, même si un nombre impair de matrices d'éléments électroluminescents sont disposées sur la carte de circuit imprimé.
(JA) 駆動基板202には、奇数個の面発光素子アレイチップ1~29が実装されており、交差方向における一方の側に奇数個の面発光素子アレイチップ1~29のうち偶数個の面発光素子アレイチップ2、4、・・・、28が配置され、交差方向における他方の側に奇数個の面発光素子アレイチップのうち残りの奇数個の面発光素子アレイチップ1、3、・・・、29が配置され、発光中心の位置は、プリント基板202の基板短手中心よりも偶数個の面発光アレイチップ2、4、・・・、28が配置されている側に移動されている。これによって、発光素子アレイをプリント基板上に奇数個配置した場合でも、プリント基板の大型化を抑え、かつ、プリント基板上の配線が混雑することを抑制することができる。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)