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1. (WO2020000408) LED CHIP STRUCTURE
Latest bibliographic data on file with the International BureauSubmit observation

Pub. No.: WO/2020/000408 International Application No.: PCT/CN2018/093778
Publication Date: 02.01.2020 International Filing Date: 29.06.2018
IPC:
H01L 33/00 (2010.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
Applicants:
天津三安光电有限公司 TIANJIN SANAN OPTOELECTRONICS CO., LTD. [CN/CN]; 中国天津市 西青区华苑产业区海泰南道20号 No.20 Haitainan Road, Huayuan New Technology Industry Development Area, Xiqing District Tianjin 300384, CN
Inventors:
王晶 WANG, Jing; CN
张昀 ZHANG, Yun; CN
吴俊毅 WU, Chun-Yi; CN
Priority Data:
Title (EN) LED CHIP STRUCTURE
(FR) STRUCTURE DE BOÎTIER DE DEL
(ZH) 一种LED芯片结构
Abstract:
(EN) Provided in the present solution is an LED chip structure, which comprises a carrier and a semi-conductor layer sequence on the carrier; a reflective layer sequence is configured between the carrier and the semi-conductor layer sequence, the reflective layer sequence having an anti-reflective film layer that faces the semi-conductor layer sequence and a metal mirror surface layer that is far from the semi-conductor layer sequence; a semi-conductor sequence comprises a first conductive semiconductor layer, a light-emitting layer and a second conductive semiconductor layer, and is characterized in that: at least a partial region of the boundary between the semi-conductor sequence and an anti-reflective film is a roughened surface or a patterned surface, while the boundary between the anti-reflective film layer and the metal mirror surface layer is a smooth surface, the smooth surface being capable of effectively improving the light-emission rate of a side surface.
(FR) La présente invention concerne une structure de puce DEL, qui comprend un support et une séquence de couches semi-conductrices sur le support; une séquence de couches réfléchissantes est configurée entre le support et la séquence de couches semi-conductrices, la séquence de couches réfléchissantes ayant une couche de film antireflet qui fait face à la séquence de couches semi-conductrices et une couche de surface de miroir métallique qui est éloignée de la séquence de couches semi-conductrices; une séquence semi-conductrice comprend une première couche semi-conductrice conductrice, une couche électroluminescente et une seconde couche semi-conductrice conductrice, et est caractérisé en ce que : au moins une région partielle de la limite entre la séquence semi-conductrice et un film antireflet est une surface rugueuse ou une surface à motifs, tandis que la limite entre la couche de film antireflet et la couche de surface de miroir métallique est une surface lisse, la surface lisse étant capable d'améliorer efficacement le taux d'émission de lumière d'une surface latérale.
(ZH) 本案提出了一种LED芯片结构,其包括一载体,载体上的一半导体层序列,一反射层序列配置在载体和半导体层序列之间,反射层序列具有一面向半导体层序列的增透膜层和一远离半导体层序列的金属镜面层,半导体序列包括:第一导电性半导体层、发光层和第二导电性半导体层,其特征在于:半导体序列与增透膜之间的界面至少部分区域为粗化面或图案化面,增透膜层与金属镜面层的界面是光滑面,该光滑面能够有效提高侧面出光率。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)