Processing

Please wait...

Settings

Settings

Goto Application

1. WO2019225339 - SEMICONDUCTOR DEVICE

Publication Number WO/2019/225339
Publication Date 28.11.2019
International Application No. PCT/JP2019/018571
International Filing Date 09.05.2019
IPC
H01L 21/822 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
H01L 27/04 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
CPC
H01L 23/5223
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
5222Capacitive arrangements or effects of, or between wiring layers
5223Capacitor integral with wiring layers
H01L 28/60
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
28Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
40Capacitors
60Electrodes
Applicants
  • 株式会社デンソー DENSO CORPORATION [JP]/[JP]
Inventors
  • 瀧澤 伸 TAKIZAWA Shin
  • 野間 誠二 NOMA Seiji
  • 野中 裕介 NONAKA Yusuke
  • 柳 振一郎 YANAGI Shinichirou
  • 笠原 淳志 KASAHARA Atsushi
  • 池浦 奨悟 IKEURA Shogo
Agents
  • 特許業務法人ゆうあい特許事務所 YOU-I PATENT FIRM
Priority Data
2018-09725221.05.2018JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR
(JA) 半導体装置
Abstract
(EN) A wiring layer (40) is disposed on a substrate (10), the wiring layer (40) comprising a first insulation film (51), an underlayer electrode part (61), a second insulation film (52), an intermediate electrode part (63), a third insulation film (53), and an upper-layer electrode part (64), laminated in the stated order. A capacitor (C) has a first capacitor (C1) constituted by including the underlayer electrode part (61) and the intermediate electrode part (63), and a second capacitor (C2) constituted by including the intermediate electrode part (63) and the upper-layer electrode part (64), the underlayer electrode part (61) and the upper-layer electrode part (64) being electrically connected, whereby the first capacitor (C1) and the second capacitor (C2) are connected in parallel. Also, the intermediate electrode part (63) is configured to have a higher potential than the underlayer electrode part (61) and the upper-layer electrode part (64).
(FR) L'invention concerne une couche de câblage (40) qui est disposée sur un substrat (10), la couche de câblage (40) comprenant un premier film d'isolation (51), une partie d'électrode de sous-couche (61), un second film d'isolation (52), une partie d'électrode intermédiaire (63), un troisième film d'isolation (53), et une partie d'électrode de couche supérieure (64), stratifiés dans l'ordre indiqué. Un condensateur (C) comprend un premier condensateur (C1) constitué en incluant la partie d'électrode de sous-couche (61) et la partie d'électrode intermédiaire (63), et un second condensateur (C2) constitué par l'inclusion de la partie d'électrode intermédiaire (63) et la partie d'électrode de couche supérieure (64), la partie d'électrode de sous-couche (61) et la partie d'électrode de couche supérieure (64) étant électriquement connectées, ce par quoi le premier condensateur (C1) et le second condensateur (C2) sont connectés en parallèle. De plus, la partie d'électrode intermédiaire (63) est configurée pour avoir un potentiel plus élevé que la partie d'électrode de sous-couche (61) et la partie d'électrode de couche supérieure (64).
(JA) 基板(10)上に、第1絶縁膜(51)、下層電極部(61)、第2絶縁膜(52)、中間電極部(63)、第3絶縁膜(53)、上層電極部(64)を順に積層した配線層(40)を配置する。そして、キャパシタ(C)は、下層電極部(61)および中間電極部(63)を含んで構成される第1キャパシタ(C1)と、中間電極部(63)および上層電極部(64)を含んで構成される第2キャパシタ(C2)とを有し、下層電極部(61)と上層電極部(64)とが電気的に接続されることで第1キャパシタ(C1)と第2キャパシタ(C2)とが並列接続されるようにする。また、中間電極部(63)が下層電極部(61)および上層電極部(64)より高電位とされるようにする。
Related patent documents
Latest bibliographic data on file with the International Bureau