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1. WO2019220796 - SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

Publication Number WO/2019/220796
Publication Date 21.11.2019
International Application No. PCT/JP2019/014439
International Filing Date 01.04.2019
IPC
H01L 21/8239 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology
8239Memory structures
G11C 11/22 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
22using ferroelectric elements
G11C 11/412 2006.1
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
41forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
412using field-effect transistors only
H01L 21/8229 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8222Bipolar technology
8229Memory structures
H01L 27/102 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
102including bipolar components
H01L 27/105 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
CPC
G11C 11/221
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
22using ferroelectric elements
221using ferroelectric capacitors
G11C 11/2259
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
22using ferroelectric elements
225Auxiliary circuits
2259Cell access
G11C 11/412
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
41forming ; static; cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
412using field-effect transistors only
G11C 11/4125
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
41forming ; static; cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
412using field-effect transistors only
4125Cells incorporating circuit means for protection against loss of information
G11C 14/0072
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
14Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
0054in which the volatile element is a SRAM cell
0072and the nonvolatile element is a ferroelectric element
G11C 7/18
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
18Bit line organisation; Bit line lay-out
Applicants
  • ソニーセミコンダクタソリューションズ株式会社 SONY SEMICONDUCTOR SOLUTIONS CORPORATION [JP]/[JP]
Inventors
  • 塚本 雅則 TSUKAMOTO, Masanori
Agents
  • 特許業務法人酒井国際特許事務所 SAKAI INTERNATIONAL PATENT OFFICE
Priority Data
2018-09298614.05.2018JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET DISPOSITIF ÉLECTRONIQUE
(JA) 半導体装置及び電子機器
Abstract
(EN) [Problem] To provide a non-volatile semiconductor memory which is capable of writing or reading at high speed and is suitable for integration at high density. [Solution] The semiconductor device comprises: a first inverter circuit that includes an n-type FET and a p-type FET; a second inverter circuit that includes an n-type FET and a p-type FET, has an output connected to an input of the first inverter circuit, and has an input connected to an output of the first inverter circuit; a first ferroelectric capacitor having one electrode connected to the input of the first inverter circuit; a second ferroelectric capacitor having one electrode connected to the input of the second inverter circuit; and a plate line that connects with the other electrode of the first ferroelectric capacitor and the other electrode of the second ferroelectric capacitor.
(FR) Le problème décrit par la présente invention est de fournir une mémoire semi-conductrice non volatile qui est capable d'écrire ou de lire à grande vitesse et qui est appropriée pour une intégration à haute densité. La solution selon l'invention porte sur un dispositif à semi-conducteur qui comprend : un premier circuit inverseur qui comprend un FET de type n et un FET de type P ; un second circuit inverseur qui comprend un FET de type n et un FET de type p, a une sortie connectée à une entrée du premier circuit inverseur, et a une entrée connectée à une sortie du premier circuit inverseur ; un premier condensateur ferroélectrique ayant une électrode connectée à l'entrée du premier circuit inverseur ; un second condensateur ferroélectrique ayant une électrode connectée à l'entrée du second circuit inverseur ; et une ligne de plaque qui se connecte à l'autre électrode du premier condensateur ferroélectrique et à l'autre électrode du second condensateur ferroélectrique.
(JA) 【課題】高速での書き込み又は読み出しが可能であり、かつ高密度での集積化に適した不揮発の半導体メモリを提供する。 【解決手段】n型FET及びp型FETを含む第1反転回路と、n型FET及びp型FETを含み、前記第1反転回路の入力に出力が接続され、前記第1反転回路の出力に入力が接続された第2反転回路と、電極の一方を前記第1反転回路の入力に接続された第1強誘電体キャパシタと、電極の一方を前記第2反転回路の入力に接続された第2強誘電体キャパシタと、前記第1強誘電体キャパシタの電極の他方、及び前記第2強誘電体キャパシタの電極の他方と接続するプレート線と、を備える、半導体装置。
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