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1. WO2019208415 - IMAGING UNIT AND METHOD FOR MANUFACTURING SAME

Publication Number WO/2019/208415
Publication Date 31.10.2019
International Application No. PCT/JP2019/016760
International Filing Date 19.04.2019
IPC
H01L 25/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
G03B 17/02 2006.01
GPHYSICS
03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
BAPPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
17Details of cameras or camera bodies; Accessories therefor
02Bodies
H01L 21/60 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H01L 23/02 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
H01L 23/10 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
10characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
H05K 1/18 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
18Printed circuits structurally associated with non-printed electric components
CPC
G03B 17/02
GPHYSICS
03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
BAPPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
17Details of cameras or camera bodies; Accessories therefor
02Bodies
H01L 2224/48227
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
48221the body and the item being stacked
48225the item being non-metallic, e.g. insulating substrate with or without metallisation
48227connecting the wire to a bond pad of the item
H01L 23/02
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
H01L 23/10
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
02Containers; Seals
10characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
H01L 25/00
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; ; Multistep manufacturing processes thereof
H01L 27/14618
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
14including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
144Devices controlled by radiation
146Imager structures
14601Structural or functional details thereof
14618Containers
Applicants
  • キヤノン株式会社 CANON KABUSHIKI KAISHA [JP]/[JP]
Inventors
  • 岸 隆史 KISHI Takafumi
Agents
  • 阿部 琢磨 ABE Takuma
  • 黒岩 創吾 KUROIWA Sogo
Priority Data
2018-08751927.04.2018JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) IMAGING UNIT AND METHOD FOR MANUFACTURING SAME
(FR) UNITÉ D'IMAGERIE ET SON PROCÉDÉ DE FABRICATION
(JA) 撮像ユニットおよびその製造方法
Abstract
(EN)
The present invention is characterized by comprising: a plurality of input wires for controlling a semiconductor chip; a plurality of first electrodes connected to the input wires; and an input connector connected to the input wires, a substrate including, on a surface opposite the surface on which the semiconductor chip is mounted, a first region for mounting an electronic component and a second region used for mounting the semiconductor chip, the connector being provided in the first region, and at least one of the first electrodes being provided in the second region.
(FR)
La présente invention est caractérisée en ce qu'elle comprend : une pluralité de fils d'entrée permettant de commander une puce semi-conductrice ; une pluralité de premières électrodes connectées aux fils d'entrée ; et un connecteur d'entrée connecté aux fils d'entrée, un substrat comprenant, sur une surface opposée à la surface sur laquelle la puce semi-conductrice est montée, une première région pour monter un composant électronique et une seconde région utilisée pour monter la puce semi-conductrice, le connecteur étant disposé dans la première région, et au moins l'une des premières électrodes étant disposée dans la seconde région.
(JA)
半導体チップを制御するための複数の入力配線と、入力配線に接続する複数の第1の電極と、入力配線に接続する入力コネクタとを備え、基板は前記半導体チップを実装する反対の面において、電子部品を実装するための第1の領域と半導体チップの実装に用いる第2の領域とを含み、コネクタは前記第1の領域に設けられ、第1の電極のうち少なくとも1以上は第2の領域に設けられることを特徴とする。
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