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1. WO2019188457 - SEMICONDUCTOR DEVICE AND MULTIPLY-ACCUMULATE OPERATION DEVICE

Publication Number WO/2019/188457
Publication Date 03.10.2019
International Application No. PCT/JP2019/011016
International Filing Date 15.03.2019
IPC
G06G 7/60 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
GANALOGUE COMPUTERS
7Devices in which the computing operation is performed by varying electric or magnetic quantities
48Analogue computers for specific processes, systems, or devices, e.g. simulators
60for living beings, e.g. their nervous systems
G06N 3/063 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
NCOMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
3Computer systems based on biological models
02using neural network models
06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
063using electronic means
H01L 45/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
45Solid state devices specially adapted for rectifying, amplifying, oscillating, or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
H01L 49/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49Solid state devices not provided for in groups H01L27/-H01L47/99; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
CPC
G06F 2207/4814
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2207Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
38Indexing scheme relating to groups G06F7/38 - G06F7/575
48Indexing scheme relating to groups G06F7/48 - G06F7/575
4802Special implementations
4814Non-logic devices, e.g. operational amplifiers
G06F 7/5443
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
7Methods or arrangements for processing data by operating upon the order or content of the data handled
38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
48using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
544for evaluating functions by calculation
5443Sum of products
G06G 7/32
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
GANALOGUE COMPUTERS
7Devices in which the computing operation is performed by varying electric or magnetic quantities
12Arrangements for performing computing operations, e.g. operational amplifiers
32for solving of equations ; or inequations; for matrices
G06G 7/60
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
GANALOGUE COMPUTERS
7Devices in which the computing operation is performed by varying electric or magnetic quantities
48Analogue computers for specific processes, systems or devices, e.g. simulators
60for living beings, e.g. their nervous systems ; ; for problems in the medical field
G06N 3/063
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
NCOMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
3Computer systems based on biological models
02using neural network models
06Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
063using electronic means
G06N 3/08
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
NCOMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS
3Computer systems based on biological models
02using neural network models
08Learning methods
Applicants
  • ソニー株式会社 SONY CORPORATION [JP]/[JP]
  • ソニーセミコンダクタソリューションズ株式会社 SONY SEMICONDUCTOR SOLUTIONS CORPORATION [JP]/[JP]
Inventors
  • 小林 俊之 KOBAYASHI, Toshiyuki
  • 森本 類 MORIMOTO, Rui
  • 奥野 潤 OKUNO, Jun
  • 塚本 雅則 TSUKAMOTO, Masanori
  • 周藤 悠介 SHUTO, Yusuke
Agents
  • 特許業務法人酒井国際特許事務所 SAKAI INTERNATIONAL PATENT OFFICE
Priority Data
2018-06979130.03.2018JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE AND MULTIPLY-ACCUMULATE OPERATION DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET DISPOSITIF D'OPÉRATION DE MULTIPLICATION-ACCUMULATION
(JA) 半導体装置及び積和演算装置
Abstract
(EN)
[Problem] To provide a semiconductor device and multiply-accumulate operation device with which higher-density integration can be achieved by further reducing the installation area for each synapse. [Solution] Provided is a semiconductor device comprising: a plurality of synapses wherein non-volatile variable resistance elements which take a first resistance value and a second resistance value which is lower than the first resistance value, and fixed resistance elements which have a higher resistance than the second resistance value, are connected in series; and an output line for outputting the sum total of the currents flowing through the plurality of synapses.
(FR)
L’objectif de l’invention est de fournir un dispositif à semi-conducteur et un dispositif d'opération de multiplication-accumulation permettant d’obtenir une intégration de densité supérieure en réduisant davantage la zone d'installation pour chaque synapse. À cet effet, l'invention concerne un dispositif à semi-conducteur comprenant : une pluralité de synapses dans lesquelles des éléments de résistance variable non volatile qui prennent une première valeur de résistance et une seconde valeur de résistance qui est inférieure à la première valeur de résistance, ainsi que des éléments de résistance fixe qui ont une résistance supérieure à la seconde valeur de résistance, sont connectés en série ; et une ligne de sortie permettant de générer la somme totale des courants circulant à travers la pluralité de synapses.
(JA)
【課題】シナプスあたりの実装面積をより縮小することで、より高密度の集積化が可能な半導体装置及び積和演算装置を提供する。 【解決手段】第1の抵抗値、及び前記第1の抵抗値よりも低い第2の抵抗値を取る不揮発性の可変抵抗素子、及び前記第2の抵抗値よりも抵抗値が高い固定抵抗素子を直列接続した複数のシナプスと、前記複数のシナプスに流れる電流の総和を出力する出力線と、 を備える、半導体装置。
Also published as
DE112019001709
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