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1. WO2019187608 - SEMICONDUCTOR DEVICE

Publication Number WO/2019/187608
Publication Date 03.10.2019
International Application No. PCT/JP2019/003057
International Filing Date 30.01.2019
IPC
H01L 23/36 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
34Arrangements for cooling, heating, ventilating or temperature compensation
36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
H01L 25/07 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
07the devices being of a type provided for in group H01L29/78
H01L 25/18 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
CPC
H01L 2224/0603
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
06of a plurality of bonding areas
0601Structure
0603Bonding areas having different sizes, e.g. different heights or widths
H01L 2224/48247
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
48221the body and the item being stacked
48245the item being metallic
48247connecting the wire to a bond pad of the item
H01L 23/36
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
34Arrangements for cooling, heating, ventilating or temperature compensation ; ; Temperature sensing arrangements
36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
H01L 25/07
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; ; Multistep manufacturing processes thereof
03all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes
04the devices not having separate containers
07the devices being of a type provided for in group H01L29/00
H01L 25/18
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; ; Multistep manufacturing processes thereof
18the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L51/00
Applicants
  • 株式会社デンソー DENSO CORPORATION [JP]/[JP]
Inventors
  • 上瀧 領二 UWATAKI Ryoji
  • 福岡 大輔 FUKUOKA Daisuke
Agents
  • 金 順姫 JIN Shunji
Priority Data
2018-06420929.03.2018JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR
(JA) 半導体装置
Abstract
(EN)
This semiconductor device is stacked on a cooling device so as to be held between cooling devices in the stacking direction. This semiconductor device comprises: an IGBT having main electrodes on both surfaces thereof; a first heat sink (14H, 14L) connected electrically to the main electrodes on one surface side and a second heat sink (18H, 18L) connected electrically to the main electrodes on the rear surface side such that the first heat sink and the second heat sink sandwich the IGBT in the Z-direction; an encapsulating resin body; a positive electrode terminal (22p) and an output terminal (23) which continue from a Y-direction side surface (14c), which is part of the first heat sink, so as to extend in the Y-direction from the side surface (14c); and an uneven oxide film formed on the heat sink surfaces. The uneven oxide film comprises a mounting surface roughened section formed on the mounting surfaces of the heat sink and side surface roughened sections (32) formed on side surfaces (18d, 18e) of the second heat sink (18H, 18L) corresponding to the side surface (14c).
(FR)
L'invention concerne un dispositif à semi-conducteur qui est empilé sur un dispositif de refroidissement de façon à être maintenu entre des dispositifs de refroidissement dans la direction d'empilement. Ce dispositif à semi-conducteur comprend : un IGBT ayant des électrodes principales sur ses deux surfaces ; un premier dissipateur thermique (14H, 14L) connecté électriquement aux électrodes principales sur un côté de surface et un second dissipateur thermique (18H, 18L) connecté électriquement aux électrodes principales sur le côté de surface arrière de telle sorte que le premier dissipateur thermique et le second dissipateur thermique prennent en sandwich l'IGBT dans la direction Z ; un corps de résine d'encapsulation ; une borne d'électrode positive (22p) et une borne de sortie (23) qui continue à partir d'une surface latérale de direction Y (14c), qui fait partie du premier dissipateur thermique, de façon à s'étendre dans la direction Y à partir de la surface latérale (14c) ; et un film d'oxyde irrégulier formé sur les surfaces de dissipateur thermique. Le film d'oxyde irrégulier comprend une section rugueuse de surface de montage formée sur les surfaces de montage du dissipateur thermique et des sections rugueuses de surface latérale (32) formées sur des surfaces latérales (18d, 18e) du second dissipateur thermique (18H, 18L) correspondant à la surface latérale (14c).
(JA)
半導体装置は、冷却器と積層され、積層方向において冷却器に挟まれて保持される。半導体装置は、両面に主電極を有するIGBT、Z方向においてIGBTを挟むように配置され、一面側の主電極と電気的に接続された第1ヒートシンク(14H,14L)、及び、裏面側の主電極と電気的に接続された第2ヒートシンク(18H,18L)、封止樹脂体、第1ヒートシンクであって、Y方向の側面(14c)に連なり、側面(14c)からY方向に延設された正極端子(22p)及び出力端子(23)、ヒートシンクの表面に形成された凹凸酸化膜を備える。凹凸酸化膜は、各ヒートシンクの実装面に形成された実装面粗化部と、第2ヒートシンク(18H,18L)において側面(14c)に対応する側面(18d,18e)に形成された側面粗化部(32)を有する。
Also published as
Latest bibliographic data on file with the International Bureau