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1. (WO2019067748) IMPLANTABLE ALL DIAMOND MICROELECTRODE AND FABRICATION METHOD
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2019/067748 International Application No.: PCT/US2018/053168
Publication Date: 04.04.2019 International Filing Date: 27.09.2018
IPC:
C30B 29/02 (2006.01) ,H01L 21/763 (2006.01) ,H01L 29/04 (2006.01)
C CHEMISTRY; METALLURGY
30
CRYSTAL GROWTH
B
SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
29
Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
02
Elements
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
76
Making of isolation regions between components
763
Polycrystalline semiconductor regions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
04
characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
Applicants:
BOARD OF TRUSTEES OF MICHIGAN STATE UNIVERSITY [US/US]; 450 Administration Building East Lansing, Michigan 48824-1046, US
FRAUNHOFER USA [US/US]; 1449 Engineering Research Ct. East Lansing, Michigan 48824, US
Inventors:
LI, Wen; US
GUO, Yue; US
SCHUELKE, Thomas; US
BECKER, Michael; US
RECHENBERG, Robert; US
RUSINEK, Cory; US
Agent:
KOTSIS, Damian H.; US
AMBROSE, John; US
AQUINO, Damian; US
BENSON, Tyson B.; US
BERBERICH, Jeanette M.; US
BRENNAN, Michael P.; US
BRITT, Nancy K.; US
BROCK, Christopher M.; US
CASTELLANO, John A., III; US
CAUBLE, Christopher M.; US
CHANG, Alex C.; US
CHAPP, Jeffrey J.; US
CHO, David J.; US
CUTLER, Matthew L.; US
DALEY, Donald J.; US
DEAVER, Darin W.; US
DELASSUS, Gregory S.; US
DOERR, Michael P.; US
DOWDY, Stephanie L.; US
DRYSDALE, Nicholas S.; US
ELCHUK, Mark D.; US
ERJAVAC, Stanley M.; US
FALCOFF, Monte L.; US
FITZPATRICK, John; US
FORBIS, Glenn E.; US
FOSS, Stephen J.; US
FRANKLIN, Clarence C.; US
FRENTRUP, Mark A.; US
FULLER, Roland, III; US
FUSSNER, Anthony G.; US
GAMBLE, Michael D.; US
HEIST, Jason A.; US
HILTON, Michael E.; US
HOYT, Blair M.; US
KELLER, Paul A.; US
KESKAR, Hemant; US
KIM, Paul M.; US
KIM, Sung Pil; US
KORAL, Elisabeth; US
KOZU, Kiyoshi; US
LAFATA, Joseph M.; US
LEE, Kisuk; US
LUCHSINGER, James B.; US
MACINTYRE, Timothy D.; US
MALINZAK, Michael; US
MARTIN, Timothy J.; US
MASSEY, Ryan W.; US
MEYER, Greg; US
MIERZWA, Kevin; US
MILLER, Christopher K.; US
MOUSTAKAS, George D.; US
NABI, Tarik M.; US
NYE, Michael; US
ODELL, Elizabeth D.; US
OLSON, Stephen T.; US
PANKA, Brian G.; US
RAKERS, Leanne; US
RICHMOND, Derek; US
ROBINSON, Douglas A.; US
SCHIANO, Thomas E.; US
SCHIVLEY, Gregory G.; US
SCHMIDT, Michael J.; US
SEITZ, Brent G.; US
SIMINSKI, Robert M.; US
SMITH, Corey E.; US
SMITH, Michael L.; US
SNYDER, Jeffrey L.; US
SUTER, David L.; US
TAYLOR, Michael L.; US
TAYLOR, W. R. Duke; US
TEICH, Michael L.; US
THOMAS, Michael J.; US
TUCKER, David J., Jr.; US
UTYKANSKI, David P.; US
VARCO, Michael A.; US
WADE, Bryant E.; US
WALKER, Donald G.; US
WALSH, JR., Joseph E.; US
WANGEROW, Steven; US
WARNER, Richard W.; US
WAXMAN, Andrew M.; US
WELCH, Gerald T.; US
WHEELOCK, Bryan K.; US
WIGGINS, Michael D.; US
WOODSIDE-WOJTALA, Jennifer; US
YACURA, Gary D.; US
ZALOBSKY, Michael D.; US
Priority Data:
62/563,98027.09.2017US
Title (EN) IMPLANTABLE ALL DIAMOND MICROELECTRODE AND FABRICATION METHOD
(FR) MICROÉLECTRODE IMPLANTABLE TOUT DIAMANT ET PROCÉDÉ DE FABRICATION
Abstract:
(EN) An electrode is provided. The electrode includes a contact pad composed of boron-doped polycrystalline diamond (BDD); a fiber core composed of BDD extending longitudinally from the contact pad from a first end that is in direct contact with the contact pad to an opposing second end; and a polycrystalline diamond (PCD) cladding that coats and hermetically seals the contact pad and the fiber core. A first portion of the contact pad and a second portion at or near the second end of the fiber core are not coated and hermetically sealed by the PCD cladding. A method of fabricating the electrode is also provided.
(FR) Cette invention concerne une électrode. L'électrode comprend une plage de contact composée de diamant polycristallin dopé au bore (BDD) ; un âme de fibre composée de diamant dopé au bore s'étendant longitudinalement à partir de la plage de contact à partir d'une première extrémité qui est en contact direct avec la plage de contact à une seconde extrémité opposée ; et un revêtement à base de diamant polycristallin (PCD) qui recouvre et scelle hermétiquement la plage de contact et l'âme de fibre. Une première partie de la plage de contact et une seconde partie sur ou à proximité de la seconde extrémité de l'âme de fibre ne sont pas revêtues et scellées hermétiquement par la gaine à base de diamant polycristallin. L'invention concerne en outre un procédé de fabrication de l'électrode.
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)