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1. (WO2019066958) IMPROVED CONTACTS TO N-TYPE TRANSISTORS WITH L-VALLEY CHANNELS
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Pub. No.: WO/2019/066958 International Application No.: PCT/US2017/054585
Publication Date: 04.04.2019 International Filing Date: 29.09.2017
IPC:
H01L 29/78 (2006.01) ,H01L 29/04 (2006.01) ,H01L 29/66 (2006.01) ,H01L 29/417 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
04
characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
41
characterised by their shape, relative sizes or dispositions
417
carrying the current to be rectified, amplified or switched
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Blvd. Santa Clara, California 95054, US
Inventors:
CRUM, Dax; US
WEBER, Cory; US
MEHANDRU, Rishabh; US
KENNEL, Harold; US
CHU-KUNG, Benjamin; US
Agent:
GUGLIELMI, David L.; US
Priority Data:
Title (EN) IMPROVED CONTACTS TO N-TYPE TRANSISTORS WITH L-VALLEY CHANNELS
(FR) CONTACTS AMÉLIORÉS DE TRANSISTORS DE TYPE N À CANAUX À CREUX EN L
Abstract:
(EN) An apparatus is provided which comprises: a first region over a substrate, wherein the first region comprises a first semiconductor material having a L-valley transport energy band structure, a second region in contact with the first region at a junction, wherein the second region comprises a second semiconductor material having a X-valley transport energy band structure, wherein a <111> crystal direction of one or more crystals of the first and second semiconductor materials are substantially orthogonal to the junction, and a metal adjacent to the second region, the metal conductively coupled to the first region through the junction. Other embodiments are also disclosed and claimed.
(FR) L'invention concerne un appareil comprenant : une première région située sur un substrat, la première région comprenant un premier matériau semi-conducteur ayant une structure de bande d'énergie de transport en creux en L, une seconde région en contact avec la première région au niveau d'une jonction, la seconde région comprenant un second matériau semi-conducteur ayant une structure de bande d'énergie de transport en creux en X, une direction de cristaux <111> d'un ou de plusieurs cristaux des premier et second matériaux semi-conducteurs étant sensiblement orthogonale à la jonction, et un métal adjacent à la seconde région, le métal étant couplé de manière conductrice à la première région par l'intermédiaire de la jonction. L'invention décrit et revendique également d'autres modes de réalisation.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)