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1. (WO2019066931) VOLTAGE REGULATOR CIRCUIT INCLUDING ONE OR MORE THIN-FILM TRANSISTORS
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Pub. No.: WO/2019/066931 International Application No.: PCT/US2017/054439
Publication Date: 04.04.2019 International Filing Date: 29.09.2017
IPC:
H01L 29/78 (2006.01) ,H01L 29/786 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
SHARMA, Abhishek A.; US
LE, Van H.; US
SUNG, Seung Hoon; US
PILLARISETTY, Ravi; US
RADOSAVLJEVIC, Marko; US
Agent:
PARKER, Wesley E.; US
MARLINK, Jeffrey S.; US
AUYEUNG, Al; US
RASKIN, Vladimir; US
DANSKIN, Timothy A.; US
MOORE, Michael S.; US
STRAUSS, Ryan N.; US
COFIELD, Michael A.; US
BLAIR, Steven R.; US
HALEVA, Aaron S.; US
MAKI, Nathan R.; US
WANG, Yuke; US
YATES, Steven; US
BERNADICOU, Michael A.; US
BRASK, Justin; US
Priority Data:
Title (EN) VOLTAGE REGULATOR CIRCUIT INCLUDING ONE OR MORE THIN-FILM TRANSISTORS
(FR) CIRCUIT RÉGULATEUR DE TENSION COMPRENANT UN OU PLUSIEURS TRANSISTORS À COUCHES MINCES
Abstract:
(EN) Described herein are apparatuses, systems, and methods associated with a voltage regulator circuit that includes one or more thin-film transistors (TFTs). The TFTs may be formed in the back-end of an integrated circuit. Additionally, the TFTs may include one or more unique features, such as a channel layer treated with a gas or plasma, and/or a gate oxide layer that is thicker than in prior TFTs. The one or more TFTs of the voltage regulator circuit may improve the operation of the voltage regulator circuit and free up front-end substrate area for other devices. Other embodiments may be described and claimed.
(FR) La présente invention concerne des appareils, des systèmes et des procédés associés à un circuit régulateur de tension qui comprend un ou plusieurs transistors à couches minces (TFT). Les TFT peuvent être disposés à l'arrière d'un circuit intégré. De plus, les TFT peuvent comprendre une ou plusieurs caractéristiques uniques, telles qu'une couche de canal traitée au moyen d'un gaz ou d'un plasma, et/ou une couche d'oxyde de grille qui est plus épaisse que dans les TFT existants. Lesdits TFT du circuit régulateur de tension peuvent améliorer le fonctionnement du circuit régulateur de tension et libérer la zone de substrat avant pour d'autres dispositifs. La présente invention concerne également d'autres modes de réalisation.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)