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1. (WO2019066875) FIELD EFFECT TRANSISTORS HAVING FERROELECTRIC OR ANTIFERROELECTRIC GATE DIELECTRIC STRUCTURE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2019/066875 International Application No.: PCT/US2017/054164
Publication Date: 04.04.2019 International Filing Date: 28.09.2017
IPC:
H01L 29/78 (2006.01) ,H01L 29/66 (2006.01) ,H01L 29/51 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
43
characterised by the materials of which they are formed
49
Metal-insulator semiconductor electrodes
51
Insulating materials associated therewith
Applicants:
KIM, Seiyon [KR/US]; US
AVCI, Uygar E. [US/US]; US
HOWARD, Joshua M. [US/US]; US
YOUNG, Ian A. [US/US]; US
MORRIS, Daniel H. [US/US]; US
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
KIM, Seiyon; US
AVCI, Uygar E.; US
HOWARD, Joshua M.; US
YOUNG, Ian A.; US
MORRIS, Daniel H.; US
Agent:
BRASK, Justin K.; US
AUYEUNG, Al; US
BERNADICOU, Michael A.; US
BLAIR, Steven R.; US
BLANK, Eric S.; US
COFIELD, Michael A.; US
DANSKIN, Timothy A.; US
HALEVA, Aaron S.; US
MAKI, Nathan R.; US
MARLINK, Jeffrey S.; US
MOORE, Michael S.; US
PARKER, Wesley E.; US
PUGH, Joseph A.; US
RASKIN, Vladimir; US
STRAUSS, Ryan N.; US
WANG, Yuke; US
YATES, Steven D.; US
SULLIVAN, Stephen G.; US
ROJO, Estiven; US
Priority Data:
Title (EN) FIELD EFFECT TRANSISTORS HAVING FERROELECTRIC OR ANTIFERROELECTRIC GATE DIELECTRIC STRUCTURE
(FR) TRANSISTORS À EFFET DE CHAMP AYANT UNE STRUCTURE DIÉLECTRIQUE DE GRILLE FERROÉLECTRIQUE OU ANTI-FERROÉLECTRIQUE
Abstract:
(EN) Field effect transistors having a ferroelectric or antiferroelectric gate dielectric structure are described. In an example, an integrated circuit structure includes a semiconductor channel structure includes a monocrystalline material. A gate dielectric is over the semiconductor channel structure. The gate dielectric includes a ferroelectric or antiferroelectric polycrystalline material layer. A gate electrode has a conductive layer on the ferroelectric or antiferroelectric polycrystalline material layer, the conductive layer including a metal. A first source or drain structure is at a first side of the gate electrode. A second source or drain structure is at a second side of the gate electrode opposite the first side.
(FR) L'invention concerne des transistors à effet de champ ayant une structure diélectrique de grille ferroélectrique ou antiferroélectrique. Dans un exemple, une structure de circuit intégré comprend une couche de canal semi-conducteur qui comprend un matériau monocristallin. Un diélectrique de grille est sur la structure de canal semi-conducteur. Le diélectrique de grille comprend une couche de matériau polycristallin ferroélectrique ou antiferroélectrique. Une électrode de grille a une couche conductrice sur la couche de matériau polycristallin ferroélectrique ou antiferroélectrique, la couche conductrice comprenant un métal. Une première structure de source ou de drain se trouve sur un premier côté de l'électrode de grille. Une seconde structure de source ou de drain se trouve sur un second côté de l'électrode de grille opposé au premier côté.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)