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1. (WO2019066872) MONOLITHIC INTEGRATION OF A THIN FILM TRANSISTOR OVER A COMPLIMENTARY TRANSISTOR
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Pub. No.: WO/2019/066872 International Application No.: PCT/US2017/054144
Publication Date: 04.04.2019 International Filing Date: 28.09.2017
IPC:
H01L 29/778 (2006.01) ,H01L 29/66 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
778
with two-dimensional charge carrier gas channel, e.g. HEMT
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Blvd Santa Clara, California 95054, US
Inventors:
LE, Van H.; US
RADOSAVLJEVIC, Marko; US
THEN, Han Wui; US
RACHMADY, Willy; US
PILLARISETTY, Ravi; US
SHARMA, Abhishek; US
DEWEY, Gilbert; US
DASGUPTA, Sansaptak; US
Agent:
MUGHAL, Usman; US
Priority Data:
Title (EN) MONOLITHIC INTEGRATION OF A THIN FILM TRANSISTOR OVER A COMPLIMENTARY TRANSISTOR
(FR) INTÉGRATION MONOLITHIQUE D'UN TRANSISTOR À FILM MINCE SUR UN TRANSISTOR COMPLÉMENTAIRE
Abstract:
(EN) A semiconductor device comprising stacked complimentary transistors are described. In some embodiments, the semiconductor device comprises a first device comprising an enhancement mode III-N heterostructure field effect transistor (HFET), and a second device over the first device. In an example, the second device comprises a depletion mode thin film transistor. In an example, a connector is to couple a first terminal of the first device to a first terminal of the second device.
(FR) L'invention concerne un dispositif semiconducteur comprenant des transistors complémentaires empilés. Dans certains modes de réalisation, le dispositif semiconducteur comprend un premier dispositif comprenant un transistor à effet de champ à hétérostructure (HFET) III-N à mode d'amélioration et un deuxième dispositif sur le premier dispositif. Dans un exemple, le deuxième dispositif comprend un transistor à film mince à mode d'appauvrissement. Dans un exemple, un connecteur est destiné à connecter une première borne du premier dispositif à une première borne du deuxième dispositif.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)