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1. (WO2019066851) A RESISTIVE RANDOM ACCESS MEMORY DEVICE AND METHODS OF FABRICATION
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Pub. No.: WO/2019/066851 International Application No.: PCT/US2017/053979
Publication Date: 04.04.2019 International Filing Date: 28.09.2017
IPC:
H01L 45/00 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
45
Solid state devices specially adapted for rectifying, amplifying, oscillating, or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Blvd Santa Clara, California 95054, US
Inventors:
ASURI, Namrata S.; US
GOLONZKA, Oleg; US
STRUTT, Nathan; US
HENTGES, Patrick J.; US
VAN, Trinh T.; US
KOTHARI, Hiten; US
CHAUDHARI, Ameya S.; US
ANDRUS, Matthew J.; US
GLASSMAN, Timothy E.; US
SEGHETE, Dragos; US
WIEGAND, Christopher J.; US
OUELLETTE, Daniel G.; US
Agent:
HOWARD, James; US
Priority Data:
Title (EN) A RESISTIVE RANDOM ACCESS MEMORY DEVICE AND METHODS OF FABRICATION
(FR) DISPOSITIF MÉMOIRE VIVE RÉSISTIVE ET PROCÉDÉS DE FABRICATION
Abstract:
(EN) An apparatus, includes an interconnect, including a conductive material, above a substrate and a resistive random access memory (RRAM) device coupled to the interconnect. The RRAM device includes an electrode structure above the interconnect, where an upper portion of the electrode structure has a first width. The RRAM device further includes a switching layer on the electrode structure, where the switching layer has the first width and an oxygen exchange layer, having a second width less than the first width, on a portion of the switching layer. The RRAM device further includes a top electrode above the oxygen exchange layer, where the top electrode has the second width and an encapsulation layer on a portion of the switching layer, where the switching layer extends along a sidewall of the oxygen exchange layer.
(FR) L'invention concerne un appareil comprenant une interconnexion, comprenant un matériau conducteur, au-dessus d'un substrat et un dispositif mémoire vive résistive (RRAM) couplé à l'interconnexion. Le dispositif RRAM comprend une structure d'électrode au-dessus de l'interconnexion, une partie supérieure de la structure d'électrode ayant une première largeur. Le dispositif RRAM comprend en outre une couche de commutation sur la structure d'électrode, la couche de commutation ayant la première largeur, et une couche d'échange d'oxygène, ayant une seconde largeur inférieure à la première largeur, sur une partie de la couche de commutation. Le dispositif RRAM comprend en outre une électrode supérieure au-dessus de la couche d'échange d'oxygène, l'électrode supérieure ayant la seconde largeur et une couche d'encapsulation sur une partie de la couche de commutation, la couche de commutation s'étendant le long d'une paroi latérale de la couche d'échange d'oxygène.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)