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1. (WO2019066821) A NEGATIVE DIFFERENTIAL RESISTANCE BASED MEMORY
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Pub. No.: WO/2019/066821 International Application No.: PCT/US2017/053831
Publication Date: 04.04.2019 International Filing Date: 27.09.2017
IPC:
G11C 11/412 (2006.01) ,G11C 11/413 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21
using electric elements
34
using semiconductor devices
40
using transistors
41
forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
412
using field-effect transistors only
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21
using electric elements
34
using semiconductor devices
40
using transistors
41
forming cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
413
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Blvd. Santa Clara, CA 95054, US
Inventors:
KUO, Charles C.; US
CHU-KUNG, Benjamin; US
AUGUSTINE, Charles; US
Agent:
MUGHAL, Usman A.; US
Priority Data:
Title (EN) A NEGATIVE DIFFERENTIAL RESISTANCE BASED MEMORY
(FR) MÉMOIRE BASÉE SUR LA RÉSISTANCE DIFFÉRENTIELLE NÉGATIVE
Abstract:
(EN) Described is an apparatus which comprises: a storage node; a first device coupled to the storage node; a second device coupled to a first reference and the storage node, wherein the second device has negative differential resistance (NDR); a third device coupled to a second reference and the storage node, wherein the third device has NDR; and a circuitry for reading data, the circuitry coupled to the storage node and the first, second, and third devices.
(FR) L'invention concerne un appareil qui comprend : un noeud de stockage; un premier dispositif couplé au noeud de stockage; un second dispositif couplé à une première référence et au noeud de stockage, le second dispositif présentant une résistance différentielle négative (NDR); un troisième dispositif couplé à une seconde référence et au noeud de stockage, le troisième dispositif présentant une NDR; et un circuit pour lire des données, le circuit étant couplé au noeud de stockage et aux premier, second et troisième dispositifs.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)