Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2019066820) CASCADED MAGNETOELECTRIC SPIN ORBIT LOGIC
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2019/066820 International Application No.: PCT/US2017/053829
Publication Date: 04.04.2019 International Filing Date: 27.09.2017
IPC:
G11C 11/16 (2006.01) ,H01L 43/08 (2006.01) ,H01L 27/22 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
02
using magnetic elements
16
using elements in which the storage effect is based on magnetic spin effect
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
43
Devices using galvano-magnetic or similar magnetic effects; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
08
Magnetic-field-controlled resistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
22
including components using galvano-magnetic effects, e.g. Hall effect; using similar magnetic field effects
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Blvd. Santa Clara, CA 95054, US
Inventors:
LIU, Huichu; US
MANIPATRUNI, Sasikanth; US
NIKONOV, Dmitri E.; US
KARNIK, Tanay; US
YOUNG, Ian A.; US
Agent:
MUGHAL, Usman A.; US
Priority Data:
Title (EN) CASCADED MAGNETOELECTRIC SPIN ORBIT LOGIC
(FR) LOGIQUE SPIN-ORBITE MAGNÉTOÉLECTRIQUE EN CASCADE
Abstract:
(EN) An apparatus is provided which comprises: a first logic device including: a spin orbit coupling material, magnetostrictive material, and at least two transistors to operate using first a clock signal; a second logic device coupled to the first logic device, the second logic device including: a spin orbit coupling material, magnetostrictive material, and at least two transistors to operate using a second clock signal; and a third logic device coupled to the second logic device, the third logic device including: a spin orbit coupling material, magnetostrictive material, and at least two transistors to operate using a third clock signal, wherein the first, second, and third clocks have overlapping phases.
(FR) L'invention concerne un appareil qui comprend : un premier dispositif logique comprenant : un matériau de couplage spin-orbite, un matériau magnétostrictif, et au moins deux transistors pour fonctionner à l'aide d'un premier signal d'horloge; un second dispositif logique couplé au premier dispositif logique, le second dispositif logique comprenant : un matériau de couplage spin-orbite, un matériau magnétostrictif, et au moins deux transistors pour fonctionner à l'aide d'un second signal d'horloge; et un troisième dispositif logique couplé au second dispositif logique, le troisième dispositif logique comprenant : un matériau de couplage spin-orbite, un matériau magnétostrictif et au moins deux transistors pour fonctionner à l'aide d'un troisième signal d'horloge, les première, secondes et troisième horloges comportant des phases de chevauchement.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)