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1. (WO2019066637) MONOLITHIC INTEGRATION OF PMUT ON CMOS
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Pub. No.: WO/2019/066637 International Application No.: PCT/MY2018/050055
Publication Date: 04.04.2019 International Filing Date: 21.08.2018
IPC:
H01L 41/09 (2006.01) ,H01L 27/20 (2006.01) ,B06B 1/06 (2006.01) ,B81B 3/00 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
41
Piezo-electric devices in general; Electrostrictive devices in general; Magnetostrictive devices in general; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
08
Piezo-electric or electrostrictive elements
09
with electrical input and mechanical output
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
20
including piezo-electric components; including electrostrictive components; including magnetostrictive components
B PERFORMING OPERATIONS; TRANSPORTING
06
GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
B
GENERATING OR TRANSMITTING MECHANICAL VIBRATIONS IN GENERAL
1
Processes or apparatus for generating mechanical vibrations of infrasonic, sonic or ultrasonic frequency
02
making use of electrical energy
06
operating with piezo-electric effect or with electrostriction
B PERFORMING OPERATIONS; TRANSPORTING
81
MICRO-STRUCTURAL TECHNOLOGY
B
MICRO-STRUCTURAL DEVICES OR SYSTEMS, e.g. MICRO-MECHANICAL DEVICES
3
Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
Applicants:
SILTERRA MALAYSIA SDN. BHD. [MY/MY]; LOT 8, PHASE II KULIM HI-TECH PARK 09000 KULIM KEDAH, MY
Inventors:
SOUNDARA PANDIAN, Mohanraj; MY
KANTIMAHANTI, Arjun Kumar; MY
Agent:
LOK, Choon Hong; MY
Priority Data:
PI 201770369529.09.2017MY
Title (EN) MONOLITHIC INTEGRATION OF PMUT ON CMOS
(FR) INTÉGRATION MONOLITHIQUE DE PMUT SUR CMOS
Abstract:
(EN) This disclosure describes a monolithic integrated device that comprises a substrate layer (101) being the base of the device; an inter-layer dielectric (102) disposed on top of the substrate layer (101) and below a passivation layer (103); an electronic circuitry formed within the inter-layer dielectric (102) and supported by the substrate layer (101), the electronic circuitry comprises a plurality of metal layers formed by one or more spaced apart metals (204); and at least one micromachined ultrasonic transducer. Each micromachined ultrasonic transducer comprises a bottom electrode (301) disposed on top of the passivation layer (103) and connected to the electronic circuitry; a piezoelectric (302) disposed on top of the bottom electrode (301); a top electrode (303) disposed on top of the piezoelectric; and an elastic layer (304) positioned on top of the top electrode (303). There is a cavity (306) formed below the bottom electrode (301) that extends from the passivation layer (103) to a portion of the inter-layer dielectric (102). (The Most Illustrative Drawing:
(FR) L'invention concerne un dispositif intégré monolithique comprenant : une couche de substrat (101) en tant que base du dispositif ; un diélectrique intercouche (102) disposé au-dessus de la couche de substrat (101) et au-dessous d'une couche de passivation (103) ; un circuit électronique formé dans le diélectrique intercouche (102) et porté par la couche de substrat (101), le circuit électronique comprenant une pluralité de couches métalliques formées par un ou plusieurs métaux espacés (204) ; et au moins un transducteur ultrasonore micro-usiné. Chaque transducteur ultrasonore micro-usiné comprend une électrode inférieure (301) disposée au-dessus de la couche de passivation (103) et connectée aux circuits électroniques ; un élément piézoélectrique (302) disposé au-dessus de l'électrode inférieure (301) ; une électrode supérieure (303) disposée au-dessus de l'élément piézoélectrique ; et une couche élastique (304) positionnée au-dessus de l'électrode supérieure (303). Une cavité (306) est formée au-dessous de l'électrode inférieure (301) qui s'étend à partir de la couche de passivation (103) jusqu'à une partie du diélectrique intercouche (102).
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)