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1. (WO2019066468) METHOD FOR MANUFACTURING CHIP INDUCTOR HAVING FINE-PITCH LINE WIDTH AND PHOTOSENSITIVE MATERIAL USED THEREFOR
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Pub. No.: WO/2019/066468 International Application No.: PCT/KR2018/011385
Publication Date: 04.04.2019 International Filing Date: 27.09.2018
IPC:
H01L 49/02 (2006.01) ,H01L 21/027 (2006.01) ,G03F 7/00 (2006.01) ,G03F 7/039 (2006.01) ,G03F 7/028 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49
Solid state devices not provided for in groups H01L27/-H01L47/99; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
02
Thin-film or thick-film devices
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
027
Making masks on semiconductor bodies for further photolithographic processing, not provided for in group H01L21/18 or H01L21/34165
G PHYSICS
03
PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
F
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
7
Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
G PHYSICS
03
PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
F
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
7
Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
004
Photosensitive materials
039
Macromolecular compounds which are photodegradable, e.g. positive electron resists
G PHYSICS
03
PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
F
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
7
Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printed surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
004
Photosensitive materials
027
Non-macromolecular photopolymerisable compounds having carbon-to-carbon double bonds, e.g. ethylenic compounds
028
with photosensitivity-increasing substances, e.g. photoinitiators
Applicants:
(주)이노시아 INNOCIA CO., LTD. [KR/KR]; 경기도 성남시 분당구 새나리로 25, 전자부품연구원 첨단기술연구센터 301호 #301, Advanced Technology Research Center Korea Electronics Technology Institute 25, Saenari-ro, Bundang-gu, Seongnam-si, Gyeonggi-do 13509, KR
Inventors:
박찬석 PARK, Chanseok; KR
백신혜 PAEK, Sinhye; KR
정일호 JUNG, Ilho; KR
Agent:
특허법인다울 DAWOOL PATENT AND LAW FIRM; 서울시 강남구 봉은사로 224 혜전빌딩 5층 5th Floor, Hyejeon Bldg. 224 Bongeunsa-ro Gangnam-gu Seoul 06135, KR
Priority Data:
10-2017-012507427.09.2017KR
10-2018-011401821.09.2018KR
Title (EN) METHOD FOR MANUFACTURING CHIP INDUCTOR HAVING FINE-PITCH LINE WIDTH AND PHOTOSENSITIVE MATERIAL USED THEREFOR
(FR) PROCÉDÉ DE FABRICATION D'UNE BOBINE D'INDUCTION DE PUCE AYANT UNE LARGEUR DE LIGNE À PAS FIN ET MATÉRIAU PHOTOSENSIBLE UTILISÉ À CET EFFET
(KO) 고정세 선폭을 가지는 칩인덕터 제조방법 및 이에 사용되는 감광성 물질
Abstract:
(EN) The present invention relates to a method for manufacturing a laminated chip inductor having a fine-pitch line width and, more particularly, to a method for manufacturing a laminated chip inductor having a plurality of electrode patterns laminated with a dielectric material layer interposed therebetween, wherein a process of forming the electrode patterns is performed by applying photosensitive conductor paste and then forming patterns through a photolithography process; a process of forming the dielectric material layer is performed by applying photosensitive dielectric material paste over the electrode patterns and then forming via-holes connected to the electrode patterns through a photolithography process; and, in the process of applying the photosensitive conductor paste, the photosensitive conductor paste fills the via-holes formed in the dielectric material layer, thereby electrically connecting the lower electrode pattern and the upper electrode pattern to each other. The present invention is advantageous in that, by using a photosensitive conductor material and a photosensitive dielectric material, it is possible to manufacture a laminated chip inductor that is more precise and has excellent durability and stability.
(FR) La présente invention concerne un procédé de fabrication d'une bobine d'induction de puce stratifiée ayant une largeur de ligne à pas fin et, plus particulièrement, un procédé de fabrication d'une bobine d'induction de puce stratifiée ayant une pluralité de motifs d'électrode stratifiés comportant une couche de matériau diélectrique interposée entre ces derniers, un procédé de formation des motifs d'électrode étant réalisé par application d'une pâte conductrice photosensible, puis par formation de motifs par l'intermédiaire d'un procédé de photolithographie ; un procédé de formation de la couche de matériau diélectrique est réalisé par application d'une pâte de matériau diélectrique photosensible sur les motifs d'électrode, puis par formation de trous d'interconnexion reliés aux motifs d'électrode par l'intermédiaire d'un procédé de photolithographie ; et, dans le processus d'application de la pâte conductrice photosensible, la pâte conductrice photosensible remplit les trous d'interconnexion formés dans la couche de matériau diélectrique, connectant ainsi électriquement le motif d'électrode inférieure et le motif d'électrode supérieur l'un à l'autre. La présente invention est avantageuse en ce que, en utilisant un matériau conducteur photosensible et un matériau diélectrique photosensible, il est possible de fabriquer une bobine d'induction de puce stratifiée qui est plus précise et présente une excellente durabilité et une excellente stabilité.
(KO) 본 발명은 고정세 선폭의 적층형 칩인덕터를 제조하는 방법에 관한 것으로, 유전체층을 사이에 두고 복수의 전극 패턴이 적층된 적층형 칩인덕터를 제조하는 방법으로서, 상기 전극 패턴을 형성하는 과정이, 감광성 도전체 페이스트를 도포한 뒤에 포토리소그래피 공정으로 패턴을 형성하여 수행되고, 상기 유전체층을 형성하는 과정이, 전극 패턴 위에 감광성 유전체 페이스트를 도포한 뒤에 포토리소그래피 공정으로 전극 패턴에 연결된 비아홀을 형성하여 수행되며, 감광성 도전체 페이스트를 도포하는 과정에서 감광성 도전체 페이스트가 유전체층에 형성된 비아홀을 채움으로써 하부의 전극 패턴과 상부의 전극 패턴이 서로 전기적으로 연결되는 것을 특징으로 한다. 본 발명은, 감광성 도전체 물질과 감광성 유전체 물질을 사용함으로써, 더욱 정밀하면서 내구성과 안정성이 뛰어난 적층형 칩인덕터를 제조할 수 있는 효과가 있다.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Korean (KO)
Filing Language: Korean (KO)