Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2019065473) MOUNTING DEVICE AND PRODUCTION METHOD
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2019/065473 International Application No.: PCT/JP2018/034921
Publication Date: 04.04.2019 International Filing Date: 20.09.2018
IPC:
H01L 21/60 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60
Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
Applicants:
株式会社新川 SHINKAWA LTD. [JP/JP]; 東京都武蔵村山市伊奈平2丁目51番地の1 51-1, Inadaira 2-chome, Musashimurayama-shi, Tokyo 2088585, JP
Inventors:
高野 徹朗 TAKANO Tetsuo; JP
中村 智宣 NAKAMURA Tomonori; JP
前田 徹 MAEDA Toru; JP
Agent:
特許業務法人YKI国際特許事務所 YKI INTELLECTUAL PROPERTY ATTORNEYS; 東京都武蔵野市吉祥寺本町一丁目34番12号 1-34-12, Kichijoji-Honcho, Musashino-shi, Tokyo 1800004, JP
Priority Data:
2017-18823528.09.2017JP
Title (EN) MOUNTING DEVICE AND PRODUCTION METHOD
(FR) DISPOSITIF DE MONTAGE ET PROCÉDÉ DE PRODUCTION
(JA) 実装装置および製造方法
Abstract:
(EN) This mounting device 10 bonds a semiconductor chip 100 onto a mounting body, which is a base board 110 or another semiconductor chip 100, to produce a semiconductor device, and comprises: a stage 30 having a first surface, and a second surface on the side facing away from the first surface; an intermediate body 40 interposed between the first surface and the base board 110; a mounting head 50 capable of relative movement with respect to the stage 30 and bonding the semiconductor chip 100 onto the mounting body; and an irradiation unit 18 irradiating from the second surface side of the stage 30 toward the intermediate body 40, an electromagnetic wave 62 that passes through the stage 30 while being absorbed by the intermediate body 40. The intermediate body absorbs the electromagnetic wave, thereby heating the base board.
(FR) Ce dispositif de montage 10 lie une puce semi-conductrice 100 sur un corps de montage, qui est une carte de base 110 ou une autre puce semi-conductrice 100, pour produire un dispositif semi-conducteur, et comprend : un étage 30 ayant une première surface, et une seconde surface sur le côté opposé à la première surface ; un corps intermédiaire 40 interposé entre la première surface et la carte de base 110 ; une tête de montage 50 capable d'effectuer un mouvement relatif par rapport à l'étage 30 et de lier la puce semi-conductrice 100 sur le corps de montage ; et une unité de rayonnement 18 qui rayonne à partir du second côté de surface de l'étage 30 vers le corps intermédiaire 40, une onde électromagnétique 62 qui traverse l'étage 30 tout en étant absorbée par le corps intermédiaire 40. Le corps intermédiaire absorbe l'onde électromagnétique, chauffant ainsi la carte de base.
(JA) 半導体チップ100を、基板110または他の半導体チップ100である被実装体にボンディングして半導体装置を製造する実装装置10は、第一面と、前記第一面と反対側の第二面と、を有するステージ30と、前記第一面と前記基板110との間に介在する中間体40と、前記ステージ30に対して相対移動が可能であり、前記半導体チップ100を前記被実装体にボンディングする実装ヘッド50と、前記ステージ30透過するとともに前記中間体40で吸収される電磁波62を前記ステージ30の第二面側から前記中間体40に向かって照射する照射ユニット18と、を備え、前記中間体が前記電磁波を吸収することで、前記基板が加熱される。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)